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authorAlex Deucher <alexander.deucher@amd.com>2013-02-15 16:26:33 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-06-27 19:16:28 -0400
commit8ba104637b5901cdc52fb0455cefcc73dc4b10e4 (patch)
tree9ae132c6b918e13c5e399f8f3c84396e3f80311b /drivers/gpu/drm/radeon/ni.c
parente0bcf1654d2639a326ea2c95efdfddfff3cc9c55 (diff)
drm/radeon: enable additional power gating features on trinity
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ni.c')
-rw-r--r--drivers/gpu/drm/radeon/ni.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index cafc3bd78a3..f30127cb30e 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1176,6 +1176,16 @@ static void cayman_gpu_init(struct radeon_device *rdev)
WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3));
udelay(50);
+
+ /* set clockgating golden values on TN */
+ if (rdev->family == CHIP_ARUBA) {
+ tmp = RREG32_CG(CG_CGTT_LOCAL_0);
+ tmp &= ~0x00380000;
+ WREG32_CG(CG_CGTT_LOCAL_0, tmp);
+ tmp = RREG32_CG(CG_CGTT_LOCAL_1);
+ tmp &= ~0x0e000000;
+ WREG32_CG(CG_CGTT_LOCAL_1, tmp);
+ }
}
/*