diff options
author | Lauri Kasanen <cand@gmx.com> | 2012-08-31 13:43:50 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:41 -0400 |
commit | 1109ca09b9e2f2766d64d037a88ea8816559b3b3 (patch) | |
tree | b9e045fd634aa413f26bbe24e2e2e10642ecb11a /drivers/gpu/drm/radeon/r100.c | |
parent | b9ce0afeef13b18b12caec476f1e6dd76f0f094b (diff) |
drm/radeon: Mark all possible functions / structs as static
Let's allow GCC to optimize better.
This exposed some five unused functions, but this patch doesn't remove them.
Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index bf3d7902f5a..cd11760f239 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -2513,7 +2513,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track /* * Global GPU functions */ -void r100_errata(struct radeon_device *rdev) +static void r100_errata(struct radeon_device *rdev) { rdev->pll_errata = 0; @@ -2529,7 +2529,7 @@ void r100_errata(struct radeon_device *rdev) } /* Wait for vertical sync on primary CRTC */ -void r100_gpu_wait_for_vsync(struct radeon_device *rdev) +static void r100_gpu_wait_for_vsync(struct radeon_device *rdev) { uint32_t crtc_gen_cntl, tmp; int i; @@ -2551,7 +2551,7 @@ void r100_gpu_wait_for_vsync(struct radeon_device *rdev) } /* Wait for vertical sync on secondary CRTC */ -void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) +static void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) { uint32_t crtc2_gen_cntl, tmp; int i; @@ -2572,7 +2572,7 @@ void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) } } -int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) +static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) { unsigned i; uint32_t tmp; @@ -2933,7 +2933,7 @@ void r100_vga_set_state(struct radeon_device *rdev, bool state) WREG32(RADEON_CONFIG_CNTL, temp); } -void r100_mc_init(struct radeon_device *rdev) +static void r100_mc_init(struct radeon_device *rdev) { u64 base; @@ -3005,7 +3005,7 @@ void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) r100_pll_errata_after_data(rdev); } -void r100_set_safe_registers(struct radeon_device *rdev) +static void r100_set_safe_registers(struct radeon_device *rdev) { if (ASIC_IS_RN50(rdev)) { rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm; @@ -3947,7 +3947,7 @@ static void r100_mc_program(struct radeon_device *rdev) r100_mc_resume(rdev, &save); } -void r100_clock_startup(struct radeon_device *rdev) +static void r100_clock_startup(struct radeon_device *rdev) { u32 tmp; |