diff options
author | Dave Airlie <airlied@redhat.com> | 2009-12-01 16:04:56 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-02 14:00:13 +1000 |
commit | 1614f8b17b8cc3ad143541d41569623d30dbc9ec (patch) | |
tree | 7b0284e942cb68ea47cdc832bbd43864b23dcd2d /drivers/gpu/drm/radeon/r420.c | |
parent | d8f60cfc93452d0554f6a701aa8e3236cbee4636 (diff) |
drm/radeon/kms: add irq mitigation code for sw interrupt.
We really don't need to process every irq that comes in, we only
really want to do SW irq processing when we are actually waiting for
a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems
so it needs some testing.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r420.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r420.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index e7c34776a01..885610f8dd8 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -186,7 +186,6 @@ static int r420_startup(struct radeon_device *rdev) } r420_pipes_init(rdev); /* Enable IRQ */ - rdev->irq.sw_int = true; r100_irq_set(rdev); /* 1M ring buffer */ r = r100_cp_init(rdev, 1024 * 1024); |