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authorAlex Deucher <alexander.deucher@amd.com>2013-04-08 11:13:01 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-04-09 10:23:50 -0400
commit9ed8b1f93ca3a274079cb36826af1331f83cd118 (patch)
treee993a18bf16c041da976e16871cd3fb5eeadf6c2 /drivers/gpu/drm/radeon/r600.c
parent367cbe2fec9b57b72605e2ac4cfd4f2fa823a256 (diff)
drm/radeon: clean up vram/gtt location handling
Add a per-asic MC (memory controller) mask which holds the mak address mask the asic is capable of. Use this when calculating the vram and gtt locations rather using asic specific functions or limiting everything to 32 bits. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0740db3fcd2..1c530877894 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1145,7 +1145,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc
}
if (rdev->flags & RADEON_IS_AGP) {
size_bf = mc->gtt_start;
- size_af = 0xFFFFFFFF - mc->gtt_end;
+ size_af = mc->mc_mask - mc->gtt_end;
if (size_bf > size_af) {
if (mc->mc_vram_size > size_bf) {
dev_warn(rdev->dev, "limiting VRAM\n");