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authorAlex Deucher <alexander.deucher@amd.com>2014-01-30 14:35:04 -0500
committerAlex Deucher <alexander.deucher@amd.com>2014-02-06 12:22:45 -0500
commit858a41c853cef2cb01de34dae334c19c1c15b237 (patch)
treee59c3e7b39d52cd7c0eace6c819f93a429117376 /drivers/gpu/drm/radeon/r600.c
parentb927e1c20462c1ad9caf4c4fa3a30e838a2d4037 (diff)
drm/radeon: fix UVD IRQ support on 7xx
Otherwise decoding isn't really useable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 56140b4e5bb..cdbc4171fe7 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3991,6 +3991,10 @@ restart_ih:
break;
}
break;
+ case 124: /* UVD */
+ DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
+ radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
+ break;
case 176: /* CP_INT in ring buffer */
case 177: /* CP_INT in IB1 */
case 178: /* CP_INT in IB2 */