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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-05-17 17:24:04 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-17 17:24:04 +0100
commitac1d426e825ab5778995f2f6f053ca2e6b45c622 (patch)
tree75b91356ca39463e0112931aa6790802fb1e07a2 /drivers/gpu/drm/radeon/r600_cp.c
parentfda0e18c8a7a3e02747c2b045b4fcd2c920410b9 (diff)
parenta3685f00652af83f12b63e3b4ef48f29581ba48b (diff)
Merge branch 'devel-stable' into devel
Conflicts: arch/arm/Kconfig arch/arm/include/asm/system.h arch/arm/mm/Kconfig
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_cp.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 40416c068d9..68e6f434930 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -1548,10 +1548,13 @@ static void r700_gfx_init(struct drm_device *dev,
RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);
RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
+ RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
RADEON_WRITE(R700_CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);
RADEON_WRITE(R700_CGTS_SYS_TCC_DISABLE, 0);
RADEON_WRITE(R700_CGTS_TCC_DISABLE, 0);
+ RADEON_WRITE(R700_CGTS_USER_SYS_TCC_DISABLE, 0);
+ RADEON_WRITE(R700_CGTS_USER_TCC_DISABLE, 0);
num_qd_pipes =
R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK) >> 8);