diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-10-11 10:41:21 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-10-11 10:41:21 -0700 |
commit | cd4edf7a3476b24f60ef3eac4260b7ff6fbc4d00 (patch) | |
tree | ea5cc2e41de0a476a18b993cc692562f64940b7f /drivers/gpu/drm/radeon/r600_hdmi.c | |
parent | 2fe80d3bbf1c8bd9efc5b8154207c8dd104e7306 (diff) | |
parent | ebff5fa9d545574324095d9c6a3cb80c9157abc5 (diff) |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"All over the map..
- nouveau:
disable MSI, needs more work, will try again next merge window
- radeon:
audio + uvd regression fixes, dpm fixes, reset fixes
- i915:
the dpms fix might fix your haswell
And one pain in the ass revert, so we have VGA arbitration that when
implemented 4-5 years ago really hoped that GPUs could remove
themselves from arbitration completely once they had a kernel driver.
It seems Intel hw designers decided that was too nice a facility to
allow us to have so they removed it when they went on-die (so since
Ironlake at least). Now Alex Williamson added support for VGA
arbitration for newer GPUs however this now exposes itself to
userspace as requireing arbitration of GPU VGA regions and the X
server gets involved and disables things that it can't handle when VGA
access is possibly required around every operation.
So in order to not break userspace we just reverted things back to the
old known broken status so maybe we can try and design out way out.
Ville also had a patch to use stop machine for the two times Intel
needs to access VGA space, that might be acceptable with some rework,
but for now myself and Daniel agreed to just go back"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (23 commits)
Revert "i915: Update VGA arbiter support for newer devices"
Revert "drm/i915: Delay disabling of VGA memory until vgacon->fbcon handoff is done"
drm/radeon: re-enable sw ACR support on pre-DCE4
drm/radeon/dpm: disable bapm on TN asics
drm/radeon: improve soft reset on CIK
drm/radeon: improve soft reset on SI
drm/radeon/dpm: off by one in si_set_mc_special_registers()
drm/radeon/dpm/btc: off by one in btc_set_mc_special_registers()
drm/radeon: forever loop on error in radeon_do_test_moves()
drm/radeon: fix hw contexts for SUMO2 asics
drm/radeon: fix typo in CP DMA register headers
drm/radeon/dpm: disable multiple UVD states
drm/radeon: use hw generated CTS/N values for audio
drm/radeon: fix N/CTS clock matching for audio
drm/radeon: use 64-bit math to calculate CTS values for audio (v2)
drm/edid: catch kmalloc failure in drm_edid_to_speaker_allocation
Revert "drm/fb-helper: don't sleep for screen unblank when an oops is in progress"
drm/gma500: fix things after get/put page helpers
drm/nouveau/mc: disable msi support by default, it's busted in tons of places
drm/i915: Only apply DPMS to the encoder if enabled
...
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_hdmi.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600_hdmi.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index b0fa6002af3..5b729319f27 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -57,15 +57,15 @@ enum r600_hdmi_iec_status_bits { static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { /* 32kHz 44.1kHz 48kHz */ /* Clock N CTS N CTS N CTS */ - { 25174, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */ + { 25175, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */ { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ - { 74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */ + { 74176, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */ { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ - { 148351, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */ + { 148352, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */ { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ { 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */ }; @@ -75,8 +75,15 @@ static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { */ static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq) { - if (*CTS == 0) - *CTS = clock * N / (128 * freq) * 1000; + u64 n; + u32 d; + + if (*CTS == 0) { + n = (u64)clock * (u64)N * 1000ULL; + d = 128 * freq; + do_div(n, d); + *CTS = n; + } DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n", N, *CTS, freq); } @@ -444,8 +451,8 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod } WREG32(HDMI0_ACR_PACKET_CONTROL + offset, - HDMI0_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */ - HDMI0_ACR_SOURCE); /* select SW CTS value */ + HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */ + HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */ WREG32(HDMI0_VBI_PACKET_CONTROL + offset, HDMI0_NULL_SEND | /* send null packets when required */ |