diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2013-12-22 02:18:01 +0100 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-12-23 10:03:43 -0500 |
| commit | 439a1cfffe2c1a06e5a6394ccd5d18a8e89b15d3 (patch) | |
| tree | 0c7fd49c562fffb10256ade2af353f3774fbaaa8 /drivers/gpu/drm/radeon/radeon.h | |
| parent | 9fadb352ed73edd7801a280b552d33a6040c8721 (diff) | |
drm/radeon: expose render backend mask to the userspace
This will allow userspace to correctly program the PA_SC_RASTER_CONFIG
register, so it can be considered a fix.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b1f990d0eaa..45e1f447bc7 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -1940,7 +1940,7 @@ struct si_asic { unsigned sc_earlyz_tile_fifo_size; unsigned num_tile_pipes; - unsigned num_backends_per_se; + unsigned backend_enable_mask; unsigned backend_disable_mask_per_asic; unsigned backend_map; unsigned num_texture_channel_caches; @@ -1970,7 +1970,7 @@ struct cik_asic { unsigned sc_earlyz_tile_fifo_size; unsigned num_tile_pipes; - unsigned num_backends_per_se; + unsigned backend_enable_mask; unsigned backend_disable_mask_per_asic; unsigned backend_map; unsigned num_texture_channel_caches; |