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authorJerome Glisse <jglisse@redhat.com>2009-09-14 18:29:49 +0200
committerDave Airlie <airlied@redhat.com>2009-09-15 08:53:14 +1000
commit4aac047323e3082d0866b8ad3784236632105af4 (patch)
treeaf4c118e42b9ea55c961c4f5bbb02998dc2cc4fe /drivers/gpu/drm/radeon/radeon_device.c
parent21f9a437222e92adb3abc68584a5f04801b92739 (diff)
drm/radeon/kms: clear confusion in GART init/deinit path
GART static one time initialization was mixed up with GART enabling/disabling which could happen several time for instance during suspend/resume cycles. This patch splits all GART handling into 4 differents function. gart_init is for one time initialization, gart_deinit is called upon module unload to free resources allocated by gart_init, gart_enable enable the GART and is intented to be call after first initialization and at each resume cycle or reset cycle. Finaly gart_disable stop the GART and is intended to be call at suspend time or when unloading the module. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c36
1 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index ece097c3e07..7b6d0b1a596 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -320,6 +320,14 @@ int radeon_asic_init(struct radeon_device *rdev)
case CHIP_RV350:
case CHIP_RV380:
rdev->asic = &r300_asic;
+ if (rdev->flags & RADEON_IS_PCIE) {
+ rdev->asic->gart_init = &rv370_pcie_gart_init;
+ rdev->asic->gart_fini = &rv370_pcie_gart_fini;
+ rdev->asic->gart_enable = &rv370_pcie_gart_enable;
+ rdev->asic->gart_disable = &rv370_pcie_gart_disable;
+ rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
+ rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
+ }
break;
case CHIP_R420:
case CHIP_R423:
@@ -504,6 +512,12 @@ int radeon_device_init(struct radeon_device *rdev,
rwlock_init(&rdev->fence_drv.lock);
INIT_LIST_HEAD(&rdev->gem.objects);
+ /* Set asic functions */
+ r = radeon_asic_init(rdev);
+ if (r) {
+ return r;
+ }
+
if (radeon_agpmode == -1) {
rdev->flags &= ~RADEON_IS_AGP;
if (rdev->family >= CHIP_RV515 ||
@@ -512,18 +526,24 @@ int radeon_device_init(struct radeon_device *rdev,
rdev->family == CHIP_R423) {
DRM_INFO("Forcing AGP to PCIE mode\n");
rdev->flags |= RADEON_IS_PCIE;
+ rdev->asic->gart_init = &rv370_pcie_gart_init;
+ rdev->asic->gart_fini = &rv370_pcie_gart_fini;
+ rdev->asic->gart_enable = &rv370_pcie_gart_enable;
+ rdev->asic->gart_disable = &rv370_pcie_gart_disable;
+ rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
+ rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
} else {
DRM_INFO("Forcing AGP to PCI mode\n");
rdev->flags |= RADEON_IS_PCI;
+ rdev->asic->gart_init = &r100_pci_gart_init;
+ rdev->asic->gart_fini = &r100_pci_gart_fini;
+ rdev->asic->gart_enable = &r100_pci_gart_enable;
+ rdev->asic->gart_disable = &r100_pci_gart_disable;
+ rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
+ rdev->asic->gart_set_page = &r100_pci_gart_set_page;
}
}
- /* Set asic functions */
- r = radeon_asic_init(rdev);
- if (r) {
- return r;
- }
-
/* set DMA mask + need_dma32 flags.
* PCIE - can handle 40-bits.
* IGP - can handle 40-bits (in theory)
@@ -623,6 +643,9 @@ int radeon_device_init(struct radeon_device *rdev,
if (r) {
return r;
}
+ r = radeon_gpu_gart_init(rdev);
+ if (r)
+ return r;
/* Initialize GART (initialize after TTM so we can allocate
* memory through TTM but finalize after TTM) */
r = radeon_gart_enable(rdev);
@@ -675,6 +698,7 @@ void radeon_device_fini(struct radeon_device *rdev)
radeon_ib_pool_fini(rdev);
radeon_cp_fini(rdev);
radeon_wb_fini(rdev);
+ radeon_gpu_gart_fini(rdev);
radeon_gem_fini(rdev);
radeon_mc_fini(rdev);
#if __OS_HAS_AGP