diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-11-30 01:54:16 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-02 11:37:13 +1000 |
commit | 32f48ffea91008a27b99aab7a68a3443559d83fb (patch) | |
tree | 3642d3bf7544b9c9458fd9eec00fa802bda7b311 /drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |
parent | 23956dfa82eab95931aab5fa9886c1e96c41e4dc (diff) |
drm/radeon/kms: fix LVDS setup on r4xx
R4xx mobility chips use atombios, which does not store
the LVDS_GEN_CNTL parameter setup like combios. Rather,
it's configured in LVDSEncoderControl. As such,
LVDS_GEN_CNTL is set wrong when on resume. Call
LVDSEncoderControl to set it properly.
Should fix fdo bug 25336
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_encoders.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 36ac47672a3..df00515e81f 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c @@ -136,7 +136,14 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder, lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; lvds_ss_gen_cntl = RREG32(RADEON_LVDS_SS_GEN_CNTL); - if ((!rdev->is_atom_bios)) { + if (rdev->is_atom_bios) { + /* LVDS_GEN_CNTL parameters are computed in LVDSEncoderControl + * need to call that on resume to set up the reg properly. + */ + radeon_encoder->pixel_clock = adjusted_mode->clock; + atombios_digital_setup(encoder, PANEL_ENCODER_ACTION_ENABLE); + lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); + } else { struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; if (lvds) { DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); @@ -147,8 +154,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder, (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); } else lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); - } else - lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); + } lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | |