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authorJiri Kosina <jkosina@suse.cz>2010-03-08 16:55:37 +0100
committerJiri Kosina <jkosina@suse.cz>2010-03-08 16:55:37 +0100
commit318ae2edc3b29216abd8a2510f3f80b764f06858 (patch)
treece595adde342f57f379d277b25e4dd206988a052 /drivers/gpu/drm/radeon/radeon_state.c
parent25cf84cf377c0aae5dbcf937ea89bc7893db5176 (diff)
parent3e58974027b04e84f68b964ef368a6cd758e2f84 (diff)
Merge branch 'for-next' into for-linus
Conflicts: Documentation/filesystems/proc.txt arch/arm/mach-u300/include/mach/debug-macro.S drivers/net/qlge/qlge_ethtool.c drivers/net/qlge/qlge_main.c drivers/net/typhoon.c
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_state.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 3c32f840dcd..40ab6d9c373 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1093,7 +1093,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
/* judging by the first tile offset needed, could possibly
directly address/clear 4x4 tiles instead of 8x2 * 4x4
macro tiles, though would still need clear mask for
- right/bottom if truely 4x4 granularity is desired ? */
+ right/bottom if truly 4x4 granularity is desired ? */
OUT_RING(tileoffset * 16);
/* the number of tiles to clear */
OUT_RING(nrtilesx + 1);