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authorAlex Deucher <alexander.deucher@amd.com>2012-03-20 17:18:18 -0400
committerDave Airlie <airlied@redhat.com>2012-03-21 06:55:53 +0000
commit8b074dd64053d0bf93eed0638b74a8fec401577f (patch)
treea1bee9e80ca26770b6a858760872f2225d1c9ae3 /drivers/gpu/drm/radeon/sid.h
parent0f0de06c809eac783ddb4ddfc52c9db43af94b4f (diff)
drm/radeon/kms: add support for MC ucode loading on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
-rw-r--r--drivers/gpu/drm/radeon/sid.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index ed1b1e5f5dd..3cc25dbf8ef 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -142,6 +142,8 @@
#define SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
#define ENABLE_ADVANCED_DRIVER_MODEL (1 << 6)
+#define MC_SHARED_BLACKOUT_CNTL 0x20ac
+
#define MC_ARB_RAMCFG 0x2760
#define NOOFBANK_SHIFT 0
#define NOOFBANK_MASK 0x00000003
@@ -157,6 +159,20 @@
#define NOOFGROUPS_SHIFT 12
#define NOOFGROUPS_MASK 0x00001000
+#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x2808
+#define TRAIN_DONE_D0 (1 << 30)
+#define TRAIN_DONE_D1 (1 << 31)
+
+#define MC_SEQ_SUP_CNTL 0x28c8
+#define RUN_MASK (1 << 0)
+#define MC_SEQ_SUP_PGM 0x28cc
+
+#define MC_IO_PAD_CNTL_D0 0x29d0
+#define MEM_FALL_OUT_CMD (1 << 8)
+
+#define MC_SEQ_IO_DEBUG_INDEX 0x2a44
+#define MC_SEQ_IO_DEBUG_DATA 0x2a48
+
#define HDP_HOST_PATH_CNTL 0x2C00
#define HDP_NONSURFACE_BASE 0x2C04
#define HDP_NONSURFACE_INFO 0x2C08