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authorThierry Reding <treding@nvidia.com>2014-11-21 17:35:54 +0100
committerThierry Reding <treding@nvidia.com>2015-01-27 10:14:43 +0100
commit36904adf217ab0755cc2ef3fa186e01fd07a2aca (patch)
tree1ffd1ca7a1ff78b5c4922a6a18b175fc6e52e501 /drivers/gpu/drm/tegra/sor.c
parent62b9e06321a254c3039966cff831487498e831a5 (diff)
drm/tegra: Stop CRTC at CRTC disable time
Previously output drivers would all stop the display controller in their disable path. However with the transition to atomic modesetting the display controller needs to be kept running until all planes have been disabled so that software can properly determine (using VBLANK counts) when it is safe to remove the framebuffers associated with the planes. Moving this code into the display controller's disable path also gets rid of the duplication of this into all output drivers. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/sor.c')
-rw-r--r--drivers/gpu/drm/tegra/sor.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 6a341822abe..1fe801ee8eb 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -1071,10 +1071,6 @@ static int tegra_output_sor_disable(struct tegra_output *output)
tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
*/
- value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);
- value &= ~DISP_CTRL_MODE_MASK;
- tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND);
-
value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);
value &= ~SOR_ENABLE;
tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);