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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-04-07 16:15:56 +0800
committerEric Anholt <eric@anholt.net>2010-04-12 09:23:42 -0700
commitb3b095b3b2b052f3c665b0d9e3e551fb65062db3 (patch)
treefaee680e4401ffb3b4e6dc0f8c8bcd78a3ced6a2 /drivers/gpu/drm
parenta4a6b90150326294b1116504ba9d678bb3f42c35 (diff)
drm/i915: enable LVDS on Cougarpoint
Fix the transcoder select bit for LVDS on CPT. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 716ab9ea19b..606924ef65a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3492,10 +3492,17 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
lvds = I915_READ(lvds_reg);
lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
- if (pipe == 1)
- lvds |= LVDS_PIPEB_SELECT;
- else
- lvds &= ~LVDS_PIPEB_SELECT;
+ if (pipe == 1) {
+ if (HAS_PCH_CPT(dev))
+ lvds |= PORT_TRANS_B_SEL_CPT;
+ else
+ lvds |= LVDS_PIPEB_SELECT;
+ } else {
+ if (HAS_PCH_CPT(dev))
+ lvds &= ~PORT_TRANS_SEL_MASK;
+ else
+ lvds &= ~LVDS_PIPEB_SELECT;
+ }
/* set the corresponsding LVDS_BORDER bit */
lvds |= dev_priv->lvds_border_bits;
/* Set the B0-B3 data pairs corresponding to whether we're going to