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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-01-05 12:01:25 -0800
committerChris Wilson <chris@chris-wilson.co.uk>2011-01-11 20:43:59 +0000
commit1daed3fb8324d517a1f9da43f1a1d3619d1b0ddc (patch)
tree26a619fb505bdd8bea7b9b175eb062557061b041 /drivers/gpu
parent88271da3f3da75d6eaef5e768c82a1627edf7088 (diff)
drm/i915: fix rc6 enabling around suspend/resume
Enabling RC6 implies setting a graphics context. Make sure we do that only after the ring has been enabled, otherwise our ring commands will hang. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c3
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c3
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 2913496e871..02fce7fbcd8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -357,6 +357,9 @@ static int i915_drm_thaw(struct drm_device *dev)
drm_helper_resume_force_mode(dev);
}
+ /* Clock gating state */
+ intel_enable_clock_gating(dev);
+
intel_opregion_init(dev);
dev_priv->modeset_on_lid = 0;
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index af530637777..147cd966670 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -868,9 +868,6 @@ int i915_restore_state(struct drm_device *dev)
I915_WRITE (IMR, dev_priv->saveIMR);
}
- /* Clock gating state */
- intel_enable_clock_gating(dev);
-
if (IS_IRONLAKE_M(dev)) {
ironlake_enable_drps(dev);
intel_init_emon(dev);