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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-12 09:35:00 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-08 10:23:41 +0100
commit0ddc1289f3ffd779779ddd3922f26ae7d0a21604 (patch)
tree005311e32548ee581272694c174eb6e458d40ce6 /drivers/gpu
parent6ba3ddd9838f5e4d6ac7c6dce95648d205e11bff (diff)
drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing.
Just makes sure that writes are not being aliased by the CPU cache and do make it out to main memory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24977 Cc: stable@kernel.org
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 4972b5ca1e8..fef4dd61dcf 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1386,6 +1386,12 @@ void intel_setup_overlay(struct drm_device *dev)
goto out_free_bo;
}
overlay->flip_addr = overlay->reg_bo->gtt_offset;
+
+ ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
+ if (ret) {
+ DRM_ERROR("failed to move overlay register bo into the GTT\n");
+ goto out_unpin_bo;
+ }
} else {
ret = i915_gem_attach_phys_object(dev, reg_bo,
I915_GEM_PHYS_OVERLAY_REGS,
@@ -1418,6 +1424,8 @@ void intel_setup_overlay(struct drm_device *dev)
DRM_INFO("initialized overlay support\n");
return;
+out_unpin_bo:
+ i915_gem_object_unpin(reg_bo);
out_free_bo:
drm_gem_object_unreference(reg_bo);
out_free: