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authorAdam Jackson <ajax@redhat.com>2010-08-23 10:19:14 -0400
committerDave Airlie <airlied@redhat.com>2010-08-27 09:10:33 +1000
commitadde0f23396fe6c6cd4fe8e66e9cdc7d1f5081d9 (patch)
tree149caf919f25d9060e4442e0172a7b39055a5b7a /drivers/gpu
parent08f2e669a81b5906adf6e4716f92d99d7966d224 (diff)
drm/modes: Fix CVT-R modeline generation
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=16651 Signed-off-by: Adam Jackson <ajax@redhat.com> Tested-by: Adam Serbinski <adam@serbinksi.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/drm_modes.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index f1f473ea97d..949326d2a8e 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -251,7 +251,10 @@ struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
/* Fill in HSync values */
drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
- drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC;
+ drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
+ /* Fill in VSync values */
+ drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
+ drm_mode->vsync_end = drm_mode->vsync_start + vsync;
}
/* 15/13. Find pixel clock frequency (kHz for xf86) */
drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;