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authorAlex Deucher <alexdeucher@gmail.com>2010-09-29 11:37:39 -0400
committerDave Airlie <airlied@redhat.com>2010-10-06 11:46:22 +1000
commitbcac54da0a6bd2ed93a2a70fe3d4ebc08c4ed779 (patch)
tree7f14911b4f81e952e07620b4765424788d54a92e /drivers/gpu
parentf981d4633a29261587e46bbf77bf29aeb2f9666a (diff)
drm/radeon/kms: prefer high post dividers in legacy pll algo
the hw prefers higher post dividers Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 902f7ce86bb..d276d6d8e2b 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -513,7 +513,7 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll,
max_fractional_feed_div = pll->max_frac_feedback_div;
}
- for (post_div = min_post_div; post_div <= max_post_div; ++post_div) {
+ for (post_div = max_post_div; post_div >= min_post_div; --post_div) {
uint32_t ref_div;
if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))