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authorAlex Deucher <alexander.deucher@amd.com>2013-07-28 18:26:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-07-29 18:14:41 -0400
commitd05f7e700a3a47eeb7dbe236d2680381f5b5edcb (patch)
tree8e31f373941a22f70e57fd26cb95e5f8fe3ddca5 /drivers/gpu
parent3652f00591982b15f0702dd90e4e5f0ddcfe7f8b (diff)
drm/radeon/dpm: disable cac setup on SI
Disable cac setup on SI for now since it causes strange performance level restrictions on certain cards. I suspect there may be issues with some of the 64 bit fixed point double emulation that is used to set up those parameters. I need to double check the math before this can be re-enabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 994f9e5b6be..e8ee6858ce2 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -1929,6 +1929,7 @@ static void si_initialize_powertune_defaults(struct radeon_device *rdev)
si_pi->cac_override = cac_override_pitcairn;
si_pi->powertune_data = &powertune_data_pitcairn;
si_pi->dte_data = dte_data_pitcairn;
+ break;
}
} else if (rdev->family == CHIP_VERDE) {
si_pi->lcac_config = lcac_cape_verde;
@@ -2041,7 +2042,8 @@ static void si_initialize_powertune_defaults(struct radeon_device *rdev)
ni_pi->enable_sq_ramping = false;
si_pi->enable_dte = false;
- if (si_pi->powertune_data->enable_powertune_by_default) {
+ /* XXX: fix me */
+ if (0/*si_pi->powertune_data->enable_powertune_by_default*/) {
ni_pi->enable_power_containment= true;
ni_pi->enable_cac = true;
if (si_pi->dte_data.enable_dte_by_default) {