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author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2007-12-16 17:31:26 +0100 |
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committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2008-01-30 22:22:21 +0100 |
commit | 4e6343a10b6afb5b036db35c4a0f0aa1333232e1 (patch) | |
tree | 3c519551bad718cc1006d570e43a2f51a6befd1d /drivers/ieee1394/pcilynx.c | |
parent | 3e75b493fbfad5d70831a2f7267c7cd8b8fec71f (diff) |
ieee1394: sbp2: raise default transfer size limit
This patch speeds up sbp2 a little bit --- but more importantly, it
brings the behavior of sbp2 and fw-sbp2 closer to each other. Like
fw-sbp2, sbp2 now does not limit the size of single transfers to 255
sectors anymore, unless told so by a blacklist flag or by module load
parameters.
Only very old bridge chips have been known to need the 255 sectors
limit, and we have got one such chip in our hardwired blacklist. There
certainly is a danger that more bridges need that limit; but I prefer to
have this issue present in both fw-sbp2 and sbp2 rather than just one of
them.
An OXUF922 with 400GB 7200RPM disk on an S400 controller is sped up by
this patch from 22.9 to 23.5 MB/s according to hdparm. The same effect
could be achieved before by setting a higher max_sectors module
parameter. On buses which use 1394b beta mode, sbp2 and fw-sbp2 will
now achieve virtually the same bandwidth. Fw-sbp2 only remains faster
on 1394a buses due to fw-core's gap count optimization.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/ieee1394/pcilynx.c')
0 files changed, 0 insertions, 0 deletions