diff options
| author | Michael Albaugh <Michael.Albaugh@Qlogic.com> | 2007-10-03 10:47:38 -0700 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2007-10-09 21:00:47 -0700 |
| commit | 6a733cdc71b7aa8107caa57f2a16629aa731242a (patch) | |
| tree | 0e367cd9105c89e6f21baf91ba0c13dc5c6921a2 /drivers/infiniband/hw/ipath/ipath_intr.c | |
| parent | 192594d5230f447ef2df8de9d7902ac90d11c118 (diff) | |
IB/ipath: Better handling of unexpected GPIO interrupts
The General Purpose I/O pins can be configured to cause interrupts. At
the end of the interrupt code dealing with all known causes, a message
is output if any bits remain un-handled. Since this is a "can't happen"
scenario, it should only be triggered by bugs elsewhere. It is harmless,
and potentially beneficial, to limit the damage by masking any such
unexpected interrupts.
This patch adds disabling of interrupts from any pins that should
not have been allowed to interrupt, in addition to emitting a message.
Signed-off-by: Michael Albaugh <Michael.Albaugh@Qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_intr.c')
| -rw-r--r-- | drivers/infiniband/hw/ipath/ipath_intr.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_intr.c b/drivers/infiniband/hw/ipath/ipath_intr.c index 61eac8cc0d9..801a20d06de 100644 --- a/drivers/infiniband/hw/ipath/ipath_intr.c +++ b/drivers/infiniband/hw/ipath/ipath_intr.c @@ -1124,10 +1124,8 @@ irqreturn_t ipath_intr(int irq, void *data) /* * Some unexpected bits remain. If they could have * caused the interrupt, complain and clear. - * MEA: this is almost certainly non-ideal. - * we should look into auto-disable of unexpected - * GPIO interrupts, possibly on a "three strikes" - * basis. + * To avoid repetition of this condition, also clear + * the mask. It is almost certainly due to error. */ const u32 mask = (u32) dd->ipath_gpio_mask; @@ -1135,6 +1133,10 @@ irqreturn_t ipath_intr(int irq, void *data) ipath_dbg("Unexpected GPIO IRQ bits %x\n", gpiostatus & mask); to_clear |= (gpiostatus & mask); + dd->ipath_gpio_mask &= ~(gpiostatus & mask); + ipath_write_kreg(dd, + dd->ipath_kregs->kr_gpio_mask, + dd->ipath_gpio_mask); } } if (to_clear) { |