diff options
author | Olof Johansson <olof@lixom.net> | 2013-02-12 15:33:15 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-02-12 15:33:15 -0800 |
commit | 488c77c961e65894d864af4da720a880a5fbb066 (patch) | |
tree | 87bf0d4b7b3f8f365009eac6a16feb4d80c91ce7 /drivers/media/platform/omap3isp/isp.c | |
parent | 379095930b0383e48be6da308e041aca8860c72d (diff) | |
parent | 14211e2fd223212ee6498a707e01ac45fef22b10 (diff) |
Merge tag 'omap-for-v3.9/clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/omap
From Tony Lindgren:
omap clock changes via Paul Walmsley <paul@pwsan.com>:
Some miscellaneous OMAP2+ clock fixes, mostly related to the recent
common clock framework conversion.
Basic test logs are available here:
http://www.pwsan.com/omap/testlogs/clock_devel_a_3.9/20130208120108/
* tag 'omap-for-v3.9/clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb
ARM: OMAP AM33XX: clock data: SET_RATE_PARENT in lcd path
ARM: OMAP2+: clock data: add DEFINE_STRUCT_CLK_FLAGS helper
ARM: OMAP2+: dpll: am335x - avoid freqsel
omap3isp: Set cam_mclk rate directly
ARM: OMAP3: clock: Back-propagate rate change from cam_mclk to dpll4_m5
Diffstat (limited to 'drivers/media/platform/omap3isp/isp.c')
-rw-r--r-- | drivers/media/platform/omap3isp/isp.c | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c index e4aaee91201..e7f5da0296f 100644 --- a/drivers/media/platform/omap3isp/isp.c +++ b/drivers/media/platform/omap3isp/isp.c @@ -1338,28 +1338,15 @@ static int isp_enable_clocks(struct isp_device *isp) { int r; unsigned long rate; - int divisor; - - /* - * cam_mclk clock chain: - * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk - * - * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are - * set to the same value. Hence the rate set for dpll4_m5 - * has to be twice of what is set on OMAP3430 to get - * the required value for cam_mclk - */ - divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2; r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]); if (r) { dev_err(isp->dev, "failed to enable cam_ick clock\n"); goto out_clk_enable_ick; } - r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK], - CM_CAM_MCLK_HZ/divisor); + r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ); if (r) { - dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n"); + dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n"); goto out_clk_enable_mclk; } r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]); @@ -1401,7 +1388,6 @@ static void isp_disable_clocks(struct isp_device *isp) static const char *isp_clocks[] = { "cam_ick", "cam_mclk", - "dpll4_m5_ck", "csi2_96m_fck", "l3_ick", }; |