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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 09:22:36 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 09:22:36 -0700
commit6f130478e24d810078c3f0ee292bcc4ec034dcce (patch)
tree1c782ccceaf998e9e23862094588c125ee6f38af /drivers/mfd/dm355evm_msp.c
parent6f128fa344833bf8bf076a51d14401661c146470 (diff)
parent75f2ba8f0006440e720e47ae14c917e07c452d72 (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (55 commits) regulator: Voltage count for AB3100 mfd: Convert WM8350 to use request_threaded_irq() mfd: Update MAINTAINERS patterns for WM831x mfd: Fix twl4030-power warnings regulator: AB3100 support rtc: AB3100 RTC support mfd: Fix ab3100-otp build failure mfd: OMAP: Board-specifc twl4030 DPS scripts for RX51 board mfd: Print warning for twl4030 out-of-order script loading mfd: Add support for TWL4030/5030 dynamic power switching mfd: AB3100 OTP readout regulator: Add Freescale MC13783 driver mfd: Add Freescale MC13783 driver mfd: AB3100 disable irq nosync mfd: AB3100 alter default setting mfd: AB3100 propagate error mfd: AB3100 accessor function cleanups rtc: Add support for RTCs on Wolfson WM831x devices regulator: get pcap data from the parent device input: PCAP2 misc input driver ...
Diffstat (limited to 'drivers/mfd/dm355evm_msp.c')
-rw-r--r--drivers/mfd/dm355evm_msp.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c
index 5b6e58a3ba4..3d4a861976c 100644
--- a/drivers/mfd/dm355evm_msp.c
+++ b/drivers/mfd/dm355evm_msp.c
@@ -107,8 +107,16 @@ static const u8 msp_gpios[] = {
MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1),
MSP_GPIO(4, SWITCH1),
/* switches on MMC/SD sockets */
- MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */
- MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */
+ /*
+ * Note: EVMDM355_ECP_VA4.pdf suggests that Bit 2 and 4 should be
+ * checked for card detection. However on the EVM bit 1 and 3 gives
+ * this status, for 0 and 1 instance respectively. The pdf also
+ * suggests that Bit 1 and 3 should be checked for write protection.
+ * However on the EVM bit 2 and 4 gives this status,for 0 and 1
+ * instance respectively.
+ */
+ MSP_GPIO(2, SDMMC), MSP_GPIO(1, SDMMC), /* mmc0 WP, nCD */
+ MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */
};
#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3)