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authorBrian Norris <computersforpeace@gmail.com>2014-04-08 18:56:06 -0700
committerBrian Norris <computersforpeace@gmail.com>2014-04-14 11:23:01 -0700
commit92d3af9ac369faf3bd2c409cf5218510500af214 (patch)
tree226d074af5c19e87c4cc2db31bcf1cc21bb77d81 /drivers/mtd/devices/serial_flash_cmds.h
parenta402191e9b5090f1db60af7d36f2568a1e648dff (diff)
mtd: st_spi_fsm: replace FLACH_CMD_* with SPINOR_OP_*
Begin to unify the differences between serial_flash_cmds.h and spi-nor.h. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/mtd/devices/serial_flash_cmds.h')
-rw-r--r--drivers/mtd/devices/serial_flash_cmds.h62
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/mtd/devices/serial_flash_cmds.h b/drivers/mtd/devices/serial_flash_cmds.h
index 4f0c2c7c898..82fa1687a2d 100644
--- a/drivers/mtd/devices/serial_flash_cmds.h
+++ b/drivers/mtd/devices/serial_flash_cmds.h
@@ -13,43 +13,43 @@
#define _MTD_SERIAL_FLASH_CMDS_H
/* Generic Flash Commands/OPCODEs */
-#define FLASH_CMD_WREN 0x06
-#define FLASH_CMD_WRDI 0x04
-#define FLASH_CMD_RDID 0x9f
-#define FLASH_CMD_RDSR 0x05
-#define FLASH_CMD_RDSR2 0x35
-#define FLASH_CMD_WRSR 0x01
-#define FLASH_CMD_SE_4K 0x20
-#define FLASH_CMD_SE_32K 0x52
-#define FLASH_CMD_SE 0xd8
-#define FLASH_CMD_CHIPERASE 0xc7
-#define FLASH_CMD_WRVCR 0x81
-#define FLASH_CMD_RDVCR 0x85
+#define SPINOR_OP_WREN 0x06
+#define SPINOR_OP_WRDI 0x04
+#define SPINOR_OP_RDID 0x9f
+#define SPINOR_OP_RDSR 0x05
+#define SPINOR_OP_RDSR2 0x35
+#define SPINOR_OP_WRSR 0x01
+#define SPINOR_OP_SE_4K 0x20
+#define SPINOR_OP_SE_32K 0x52
+#define SPINOR_OP_SE 0xd8
+#define SPINOR_OP_CHIPERASE 0xc7
+#define SPINOR_OP_WRVCR 0x81
+#define SPINOR_OP_RDVCR 0x85
/* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */
-#define FLASH_CMD_READ 0x03 /* READ */
-#define FLASH_CMD_READ_FAST 0x0b /* FAST READ */
-#define FLASH_CMD_READ_1_1_2 0x3b /* DUAL OUTPUT READ */
-#define FLASH_CMD_READ_1_2_2 0xbb /* DUAL I/O READ */
-#define FLASH_CMD_READ_1_1_4 0x6b /* QUAD OUTPUT READ */
-#define FLASH_CMD_READ_1_4_4 0xeb /* QUAD I/O READ */
+#define SPINOR_OP_READ 0x03 /* READ */
+#define SPINOR_OP_READ_FAST 0x0b /* FAST READ */
+#define SPINOR_OP_READ_1_1_2 0x3b /* DUAL OUTPUT READ */
+#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */
+#define SPINOR_OP_READ_1_1_4 0x6b /* QUAD OUTPUT READ */
+#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */
-#define FLASH_CMD_WRITE 0x02 /* PAGE PROGRAM */
-#define FLASH_CMD_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */
-#define FLASH_CMD_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */
-#define FLASH_CMD_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */
-#define FLASH_CMD_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */
+#define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */
+#define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */
+#define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */
+#define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */
+#define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */
-#define FLASH_CMD_EN4B_ADDR 0xb7 /* Enter 4-byte address mode */
-#define FLASH_CMD_EX4B_ADDR 0xe9 /* Exit 4-byte address mode */
+#define SPINOR_OP_EN4B_ADDR 0xb7 /* Enter 4-byte address mode */
+#define SPINOR_OP_EX4B_ADDR 0xe9 /* Exit 4-byte address mode */
/* READ commands with 32-bit addressing */
-#define FLASH_CMD_READ4 0x13
-#define FLASH_CMD_READ4_FAST 0x0c
-#define FLASH_CMD_READ4_1_1_2 0x3c
-#define FLASH_CMD_READ4_1_2_2 0xbc
-#define FLASH_CMD_READ4_1_1_4 0x6c
-#define FLASH_CMD_READ4_1_4_4 0xec
+#define SPINOR_OP_READ4 0x13
+#define SPINOR_OP_READ4_FAST 0x0c
+#define SPINOR_OP_READ4_1_1_2 0x3c
+#define SPINOR_OP_READ4_1_2_2 0xbc
+#define SPINOR_OP_READ4_1_1_4 0x6c
+#define SPINOR_OP_READ4_1_4_4 0xec
/* Configuration flags */
#define FLASH_FLAG_SINGLE 0x000000ff