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authorHåvard Skinnemoen <haavard.skinnemoen@atmel.com>2008-06-06 18:04:53 +0200
committerDavid Woodhouse <dwmw2@infradead.org>2008-06-07 08:43:00 +0100
commit3c3796cc32b6e53653a5eb868dc959b8c2779db9 (patch)
tree2ff83e14ac5e4b0889f06ad76951972bd4c3db17 /drivers/mtd/nand/atmel_nand_ecc.h
parentd4f4c0aa8e36f69e46360b3d3569dc15d6099894 (diff)
[MTD] [NAND] rename at91_nand -> atmel_nand: internal symbols
This is basically s/at91_nand/atmel_nand/g with some manual inspection. Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/nand/atmel_nand_ecc.h')
-rw-r--r--drivers/mtd/nand/atmel_nand_ecc.h34
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h
index 170db869aac..1ee7f993db1 100644
--- a/drivers/mtd/nand/atmel_nand_ecc.h
+++ b/drivers/mtd/nand/atmel_nand_ecc.h
@@ -11,26 +11,26 @@
#ifndef ATMEL_NAND_ECC_H
#define ATMEL_NAND_ECC_H
-#define AT91_ECC_CR 0x00 /* Control register */
-#define AT91_ECC_RST (1 << 0) /* Reset parity */
+#define ATMEL_ECC_CR 0x00 /* Control register */
+#define ATMEL_ECC_RST (1 << 0) /* Reset parity */
-#define AT91_ECC_MR 0x04 /* Mode register */
-#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
-#define AT91_ECC_PAGESIZE_528 (0)
-#define AT91_ECC_PAGESIZE_1056 (1)
-#define AT91_ECC_PAGESIZE_2112 (2)
-#define AT91_ECC_PAGESIZE_4224 (3)
+#define ATMEL_ECC_MR 0x04 /* Mode register */
+#define ATMEL_ECC_PAGESIZE (3 << 0) /* Page Size */
+#define ATMEL_ECC_PAGESIZE_528 (0)
+#define ATMEL_ECC_PAGESIZE_1056 (1)
+#define ATMEL_ECC_PAGESIZE_2112 (2)
+#define ATMEL_ECC_PAGESIZE_4224 (3)
-#define AT91_ECC_SR 0x08 /* Status register */
-#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
-#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
-#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
+#define ATMEL_ECC_SR 0x08 /* Status register */
+#define ATMEL_ECC_RECERR (1 << 0) /* Recoverable Error */
+#define ATMEL_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
+#define ATMEL_ECC_MULERR (1 << 2) /* Multiple Errors */
-#define AT91_ECC_PR 0x0c /* Parity register */
-#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
-#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
+#define ATMEL_ECC_PR 0x0c /* Parity register */
+#define ATMEL_ECC_BITADDR (0xf << 0) /* Bit Error Address */
+#define ATMEL_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
-#define AT91_ECC_NPR 0x10 /* NParity register */
-#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
+#define ATMEL_ECC_NPR 0x10 /* NParity register */
+#define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */
#endif