diff options
| author | Simon Kagstrom <simon.kagstrom@netinsight.net> | 2009-08-20 09:19:53 +0200 |
|---|---|---|
| committer | Nicolas Pitre <nico@cam.org> | 2009-08-24 11:56:00 -0400 |
| commit | 94da210af4978b94cb70318bd1b282a73c50b175 (patch) | |
| tree | 804b77b50f7aba63d416f0a579405879daeb42b6 /drivers/mtd/nand/orion_nand.c | |
| parent | c55bf102b675c94edef006ce487d909669221d90 (diff) | |
[ARM] Orion NAND: Make asm volatile avoid GCC pushing ldrd out of the loop
GCC 4.3.3 and 4.4.1 happily moves the dword load instruction out of the
loop in orion_nand_read_buf. This patch makes the instruction volatile
to avoid the issue. I've discussed this at gcc-help, refer to the thread
at
http://gcc.gnu.org/ml/gcc-help/2009-08/msg00187.html
The early clobber is added to avoid the destination registers and the
source register overlapping.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'drivers/mtd/nand/orion_nand.c')
| -rw-r--r-- | drivers/mtd/nand/orion_nand.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index 7ad972229db..0d9d4bc9c76 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c @@ -61,7 +61,7 @@ static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) buf64 = (uint64_t *)buf; while (i < len/8) { uint64_t x; - asm ("ldrd\t%0, [%1]" : "=r" (x) : "r" (io_base)); + asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); buf64[i++] = x; } i *= 8; |