diff options
| author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-11-14 18:25:34 -0300 |
|---|---|---|
| committer | Brian Norris <computersforpeace@gmail.com> | 2014-01-03 11:22:13 -0800 |
| commit | 39f83d15df36fa2d50de677e0743438df2ed4cf4 (patch) | |
| tree | bbcefc4e05c99732783ec1563d8249eb9df79042 /drivers/mtd/nand/pxa3xx_nand.c | |
| parent | c39ff03a402e354eb73c61cb732f9bc881d76879 (diff) | |
mtd: nand: pxa3xx: Move the data buffer clean to prepare_start_command()
To allow future support of multiple page reading/writing, move the data
buffer clean out of prepare_set_command().
This is done to prevent the data buffer from being cleaned on every command
preparation, when a multiple command sequence is implemented to read/write
pages larger than the FIFO size (2 KiB).
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/pxa3xx_nand.c')
| -rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index db96a7fe04a..7a164fbd7a1 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -605,6 +605,9 @@ static void set_command_address(struct pxa3xx_nand_info *info, static void prepare_start_command(struct pxa3xx_nand_info *info, int command) { + struct pxa3xx_nand_host *host = info->host[info->cs]; + struct mtd_info *mtd = host->mtd; + /* reset data and oob column point to handle data */ info->buf_start = 0; info->buf_count = 0; @@ -629,6 +632,19 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command) info->ndcb2 = 0; break; } + + /* + * If we are about to issue a read command, or about to set + * the write address, then clean the data buffer. + */ + if (command == NAND_CMD_READ0 || + command == NAND_CMD_READOOB || + command == NAND_CMD_SEQIN) { + + info->buf_count = mtd->writesize + mtd->oobsize; + memset(info->data_buff, 0xFF, info->buf_count); + } + } static int prepare_set_command(struct pxa3xx_nand_info *info, int command, @@ -670,16 +686,11 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command, info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8); set_command_address(info, mtd->writesize, column, page_addr); - info->buf_count = mtd->writesize + mtd->oobsize; - memset(info->data_buff, 0xFF, info->buf_count); break; case NAND_CMD_SEQIN: set_command_address(info, mtd->writesize, column, page_addr); - info->buf_count = mtd->writesize + mtd->oobsize; - memset(info->data_buff, 0xFF, info->buf_count); - break; case NAND_CMD_PAGEPROG: |