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authorSathya Perla <sathyap@serverengines.com>2010-06-29 00:11:17 +0000
committerDavid S. Miller <davem@davemloft.net>2010-06-30 13:26:42 -0700
commitf3eb62d2cc7da7bea4b394dd06f6bc738aa284e7 (patch)
tree2e98c0b346690eeca0ea6cad6f8f21a9e16af476 /drivers/net/benet/be_cmds.c
parent7e307c7ad5340b226966da6e564ec7f717da3adb (diff)
be2net: memory barrier fixes on IBM p7 platform
The ibm p7 architecure seems to reorder memory accesses more aggressively than previous ppc64 architectures. This requires memory barriers to ensure that rx/tx doorbells are pressed only after memory to be DMAed is written. Signed-off-by: Sathya Perla <sathyap@serverengines.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/benet/be_cmds.c')
-rw-r--r--drivers/net/benet/be_cmds.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index ee1ad9693c8..65e3260d0f0 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -25,6 +25,8 @@ static void be_mcc_notify(struct be_adapter *adapter)
val |= mccq->id & DB_MCCQ_RING_ID_MASK;
val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT;
+
+ wmb();
iowrite32(val, adapter->db + DB_MCCQ_OFFSET);
}