diff options
| author | Michael Chan <mchan@broadcom.com> | 2008-01-29 21:34:08 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-01-31 19:27:13 -0800 |
| commit | 6f743ca052575a26439d796249d9e7740b8192d7 (patch) | |
| tree | 1fb81426131ff21d4201b565e9d007c4fbc2686c /drivers/net/bnx2.c | |
| parent | f3014c0cb60ec15a0a2542cbfae7e8d888aa5cf8 (diff) | |
[BNX2]: Refine tx coalescing setup.
Make the tx coalescing setup code independent of the MSIX vector.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.c')
| -rw-r--r-- | drivers/net/bnx2.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 353c73fa343..8d0022d0cc4 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -4438,18 +4438,21 @@ bnx2_init_chip(struct bnx2 *bp) } if (bp->flags & BNX2_FLAG_USING_MSIX) { + u32 base = ((BNX2_TX_VEC - 1) * BNX2_HC_SB_CONFIG_SIZE) + + BNX2_HC_SB_CONFIG_1; + REG_WR(bp, BNX2_HC_MSIX_BIT_VECTOR, BNX2_HC_MSIX_BIT_VECTOR_VAL); - REG_WR(bp, BNX2_HC_SB_CONFIG_1, + REG_WR(bp, base, BNX2_HC_SB_CONFIG_1_TX_TMR_MODE | BNX2_HC_SB_CONFIG_1_ONE_SHOT); - REG_WR(bp, BNX2_HC_TX_QUICK_CONS_TRIP_1, + REG_WR(bp, base + BNX2_HC_TX_QUICK_CONS_TRIP_OFF, (bp->tx_quick_cons_trip_int << 16) | bp->tx_quick_cons_trip); - REG_WR(bp, BNX2_HC_TX_TICKS_1, + REG_WR(bp, base + BNX2_HC_TX_TICKS_OFF, (bp->tx_ticks_int << 16) | bp->tx_ticks); val |= BNX2_HC_CONFIG_SB_ADDR_INC_128B; |