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authorPaul Mackerras <paulus@samba.org>2007-09-14 01:24:25 +1000
committerPaul Mackerras <paulus@samba.org>2007-09-14 01:24:25 +1000
commitb2315372eac9cd9f622c32a93e323cf6f0f03462 (patch)
tree9e1faa7cdcddf5d90bec4fb9523742d4cce699a1 /drivers/net/bnx2.c
parent5326152fa182b0a16e4abf913ce403e3c7ab53b7 (diff)
parentc87ce65868bbf9bbea9c3f112ff8315302daf8f2 (diff)
Merge branch 'linux-2.6' into for-2.6.24
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r--drivers/net/bnx2.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 24e7f9ab3f5..854d80c330e 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3934,11 +3934,13 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
/* Chip reset. */
REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
+ /* Reading back any register after chip reset will hang the
+ * bus on 5706 A0 and A1. The msleep below provides plenty
+ * of margin for write posting.
+ */
if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
- (CHIP_ID(bp) == CHIP_ID_5706_A1)) {
- current->state = TASK_UNINTERRUPTIBLE;
- schedule_timeout(HZ / 50);
- }
+ (CHIP_ID(bp) == CHIP_ID_5706_A1))
+ msleep(20);
/* Reset takes approximate 30 usec */
for (i = 0; i < 10; i++) {