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authorYaniv Rosner <yaniv.rosner@broadcom.com>2010-11-01 05:32:36 +0000
committerDavid S. Miller <davem@davemloft.net>2010-11-01 06:21:38 -0700
commit650154bfd1ef3119e7c79f35447f0e11a5e4f7c6 (patch)
tree998a36ac612ea93b678c0e1c942067219da3afba /drivers/net/bnx2x
parentcf1d972cb6393b9b042289739111773226861d6c (diff)
bnx2x: Fix resetting BCM8726 PHY during common init
On BCM8726 based designs, the ports are swapped, hence the reset needs to be asserted through port0 and not port1. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x')
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index fdd7e034946..488e251a2d3 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -7152,7 +7152,7 @@ static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp,
(1<<(MISC_REGISTERS_GPIO_3 + MISC_REGISTERS_GPIO_PORT_SHIFT)));
REG_WR(bp, MISC_REG_GPIO_EVENT_EN, val);
- bnx2x_ext_phy_hw_reset(bp, 1);
+ bnx2x_ext_phy_hw_reset(bp, 0);
msleep(5);
for (port = 0; port < PORT_MAX; port++) {
u32 shmem_base, shmem2_base;