summaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/broadcom/bcm63xx_enet.h
diff options
context:
space:
mode:
authorFlorian Fainelli <florian@openwrt.org>2013-06-12 20:53:05 +0100
committerDavid S. Miller <davem@davemloft.net>2013-06-13 17:22:08 -0700
commit3dc6475c0c9e55ac7f053ad6b8b398e779954545 (patch)
treeb0dfa7d618905408e6ed1fe369e263c9fc02170c /drivers/net/ethernet/broadcom/bcm63xx_enet.h
parentca4ec90b31d1ecf01087c607933cf792057bc8bf (diff)
bcm63xx_enet: add support Broadcom BCM6345 Ethernet
This patch adds support for the Broadcom BCM6345 SoC Ethernet. BCM6345 has a slightly different and older DMA engine which requires the following modifications: - the width of the DMA channels on BCM6345 is 64 bytes vs 16 bytes, which means that the helpers enet_dma{c,s} need to account for this channel width and we can no longer use macros - BCM6345 DMA engine does not have any internal SRAM for transfering buffers - BCM6345 buffer allocation and flow control is not per-channel but global (done in RSET_ENETDMA) - the DMA engine bits are right-shifted by 3 compared to other DMA generations - the DMA enable/interrupt masks are a little different (we need to enabled more bits for 6345) - some register have the same meaning but are offsetted in the ENET_DMAC space so a lookup table is required to return the proper offset The MAC itself is identical and requires no modifications to work. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bcm63xx_enet.h')
-rw-r--r--drivers/net/ethernet/broadcom/bcm63xx_enet.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.h b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
index 721ffbaef8d..f55af431008 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
@@ -339,6 +339,21 @@ struct bcm_enet_priv {
/* used to poll switch port state */
struct timer_list swphy_poll;
spinlock_t enetsw_mdio_lock;
+
+ /* dma channel enable mask */
+ u32 dma_chan_en_mask;
+
+ /* dma channel interrupt mask */
+ u32 dma_chan_int_mask;
+
+ /* DMA engine has internal SRAM */
+ bool dma_has_sram;
+
+ /* dma channel width */
+ unsigned int dma_chan_width;
+
+ /* dma descriptor shift value */
+ unsigned int dma_desc_shift;
};