diff options
| author | Michael Chan <mchan@broadcom.com> | 2012-09-28 07:12:43 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-09-30 02:10:36 -0400 |
| commit | cf6d6ea660f46a030a5185cf577856bdd547c2bf (patch) | |
| tree | b99ba84c27c9d06c4bc850230544e7be9377fc65 /drivers/net/ethernet/broadcom/tg3.c | |
| parent | 0968169c9271ddf05a7531274ffe4829f9d068b2 (diff) | |
tg3: Disable multiple TX rings by default due to hardware flaw
Simple round-robin hardware TX scheduling can cause starvation of TX rings
with small packets when other TX rings have large TSO or jumbo packets.
In the simplest case, consider 2 TCP streams running in opposite
directions. The TSO TX traffic will hash to one ring and the ACKs for the
incoming data on a different TCP connection will hash to a different TX
ring. The hardware fetches one complete TSO packet (up to 64K data)
before servicing the other TX ring. When it gets to the other TX ring, it
will only fetch one packet (64-byte ACK packet in this case). After that,
it will switch back to the 1st ring filled with more TSO packets. Because
only one ACK can go out roughly every 500 usec in this case, the incoming
data rate becomes very low.
Update version to 3.125.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.c')
| -rw-r--r-- | drivers/net/ethernet/broadcom/tg3.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 74eea2fbb4f..24f6623c82a 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -92,10 +92,10 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits) #define DRV_MODULE_NAME "tg3" #define TG3_MAJ_NUM 3 -#define TG3_MIN_NUM 124 +#define TG3_MIN_NUM 125 #define DRV_MODULE_VERSION \ __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM) -#define DRV_MODULE_RELDATE "March 21, 2012" +#define DRV_MODULE_RELDATE "September 26, 2012" #define RESET_KIND_SHUTDOWN 0 #define RESET_KIND_INIT 1 @@ -10245,10 +10245,13 @@ static bool tg3_enable_msix(struct tg3 *tp) tp->rxq_cnt = netif_get_num_default_rss_queues(); if (tp->rxq_cnt > tp->rxq_max) tp->rxq_cnt = tp->rxq_max; - if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || - GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) && - !tp->txq_req) - tp->txq_cnt = min(tp->rxq_cnt, tp->txq_max); + + /* Disable multiple TX rings by default. Simple round-robin hardware + * scheduling of the TX rings can cause starvation of rings with + * small packets when other rings have TSO or jumbo packets. + */ + if (!tp->txq_req) + tp->txq_cnt = 1; tp->irq_cnt = tg3_irq_count(tp); |