diff options
| author | Yuval Mintz <yuvalmin@broadcom.com> | 2012-06-17 02:04:50 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-06-17 16:16:51 -0700 |
| commit | 79504d708d8be4131fbb115912521739c11db750 (patch) | |
| tree | b7576f012db5aed981446a3178d7416db14722a5 /drivers/net/ethernet/broadcom | |
| parent | 260762c7d8030055a157b6f4ea7d1805a09e59e8 (diff) | |
bnx2x: correct LPI pass-through configuration
Commit c8c60d88c59cbb48737732ba948663a3efe882aa contained
an incorrect logic which enabled a buffer overflow when accessing
an array during LPI pass-through configuration.
This patch fixes this issue by removing that logic altogether.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom')
| -rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index c7c814db027..91aa565d437 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c @@ -4057,18 +4057,12 @@ static void bnx2x_warpcore_set_10G_XFI(struct bnx2x_phy *phy, MDIO_WC_REG_DIGITAL4_MISC3, val | 0x8080); /* Enable LPI pass through */ - if ((params->eee_mode & EEE_MODE_ADV_LPI) && - (phy->flags & FLAGS_EEE_10GBT) && - (!(params->eee_mode & EEE_MODE_ENABLE_LPI) || - bnx2x_eee_calc_timer(params)) && - (params->req_duplex[bnx2x_phy_selection(params)] == DUPLEX_FULL)) { - DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n"); - bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, - MDIO_WC_REG_EEE_COMBO_CONTROL0, - 0x7c); - bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, - MDIO_WC_REG_DIGITAL4_MISC5, 0xc000); - } + DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n"); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_EEE_COMBO_CONTROL0, + 0x7c); + bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC5, 0xc000); /* 10G XFI Full Duplex */ bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, |