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authorRichard Cochran <richardcochran@gmail.com>2014-03-20 22:21:55 +0100
committerDavid S. Miller <davem@davemloft.net>2014-03-21 14:21:14 -0400
commit4986b4f008c45cf846dfe76a4602b4a7b027650c (patch)
tree2e758a8de5229a70cb5cb7497f86e28cc72b3b0d /drivers/net/ethernet/tile/tilegx.c
parent653104d19a7d490baeb94113151e95d8c04ef01d (diff)
ptp: drivers: set the number of programmable pins.
This patch updates the many PTP Hardware Clock drivers with the newly introduced field that advertises the number of programmable pins. Some of these devices do have programmable pins, but the implementation will have to wait for follow on patches. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/tile/tilegx.c')
-rw-r--r--drivers/net/ethernet/tile/tilegx.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c
index b43f1b3b963..7e1c91d41a8 100644
--- a/drivers/net/ethernet/tile/tilegx.c
+++ b/drivers/net/ethernet/tile/tilegx.c
@@ -873,6 +873,7 @@ static struct ptp_clock_info ptp_mpipe_caps = {
.name = "mPIPE clock",
.max_adj = 999999999,
.n_ext_ts = 0,
+ .n_pins = 0,
.pps = 0,
.adjfreq = ptp_mpipe_adjfreq,
.adjtime = ptp_mpipe_adjtime,