diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-05 13:51:19 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-07 11:18:59 -0700 |
| commit | f2692bd9be3415ccfcb3a2d33b12ab6621c53067 (patch) | |
| tree | 19df53f22ef1f350b5ec71c121e84a9b3b5f65b7 /drivers/net/ethernet | |
| parent | 7508320678b7819ac6aeb89580b8622a424ce586 (diff) | |
cxgb3: Use standard #defines for PCIe Capability ASPM fields
Use the standard #defines rather than bare numbers for PCIe Capability
ASPM fields.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb3/t3_hw.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c index aef45d3113b..3dee68612c9 100644 --- a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c @@ -3307,7 +3307,7 @@ static void config_pcie(struct adapter *adap) G_NUMFSTTRNSEQRX(t3_read_reg(adap, A_PCIE_MODE)); log2_width = fls(adap->params.pci.width) - 1; acklat = ack_lat[log2_width][pldsize]; - if (val & 1) /* check LOsEnable */ + if (val & PCI_EXP_LNKCTL_ASPM_L0S) /* check LOsEnable */ acklat += fst_trn_tx * 4; rpllmt = rpl_tmr[log2_width][pldsize] + fst_trn_rx * 4; |