diff options
| author | Alexander Duyck <alexander.h.duyck@intel.com> | 2009-02-15 23:59:44 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-02-15 23:59:44 -0800 |
| commit | cbd347adfee2ba52a8ef85f92a46933d5840cc39 (patch) | |
| tree | 6fe593287cc6486e78201da9419255530046fac1 /drivers/net/igb/e1000_82575.h | |
| parent | bc1cbd3493c7a6b44fa6a1e6040ae3d9640d47c4 (diff) | |
igb: remove unused defines
This patch removes all of the unused defines from the .h files contained in
igb. For some defines there was a use and so I plugged them into the correct
locations.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_82575.h')
| -rw-r--r-- | drivers/net/igb/e1000_82575.h | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h index e613d5a606d..49b41c92a8c 100644 --- a/drivers/net/igb/e1000_82575.h +++ b/drivers/net/igb/e1000_82575.h @@ -58,9 +58,6 @@ extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); E1000_EICR_RX_QUEUE2 | \ E1000_EICR_RX_QUEUE3) -#define E1000_EIMS_RX_QUEUE E1000_EICR_RX_QUEUE -#define E1000_EIMS_TX_QUEUE E1000_EICR_TX_QUEUE - /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ /* Receive Descriptor - Advanced */ @@ -95,12 +92,6 @@ union e1000_adv_rx_desc { #define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0 #define E1000_RXDADV_HDRBUFLEN_SHIFT 5 -/* RSS Hash results */ - -/* RSS Packet Types as indicated in the receive descriptor */ -#define E1000_RXDADV_PKTTYPE_IPV4 0x00000010 /* IPV4 hdr present */ -#define E1000_RXDADV_PKTTYPE_TCP 0x00000100 /* TCP hdr present */ - /* Transmit Descriptor - Advanced */ union e1000_adv_tx_desc { struct { @@ -150,11 +141,8 @@ struct e1000_adv_tx_context_desc { #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */ /* Direct Cache Access (DCA) definitions */ -#define E1000_DCA_CTRL_DCA_ENABLE 0x00000000 /* DCA Enable */ -#define E1000_DCA_CTRL_DCA_DISABLE 0x00000001 /* DCA Disable */ - -#define E1000_DCA_CTRL_DCA_MODE_CB1 0x00 /* DCA Mode CB1 */ -#define E1000_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */ +#define E1000_DCA_CTRL_DCA_MODE_DISABLE 0x01 /* DCA Disable */ +#define E1000_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */ #define E1000_DCA_RXCTRL_CPUID_MASK 0x0000001F /* Rx CPUID Mask */ #define E1000_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* DCA Rx Desc enable */ |