diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-10-03 19:28:46 +0200 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-10-03 19:28:46 +0200 |
commit | f68ec0c24755e5cdb779be6240925f2175311d84 (patch) | |
tree | a7b7128e61a8456385d82bd1c7ca5f14eecbf2ca /drivers/net/igb/e1000_phy.c | |
parent | 98920dc3d1113b883cbc73e3293446d3525c6042 (diff) | |
parent | 94aca1dac6f6d21f4b07e4864baf7768cabcc6e7 (diff) |
Merge commit 'v2.6.27-rc8' into x86/setup
Diffstat (limited to 'drivers/net/igb/e1000_phy.c')
-rw-r--r-- | drivers/net/igb/e1000_phy.c | 138 |
1 files changed, 68 insertions, 70 deletions
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c index 08a86b10722..17fddb91c9f 100644 --- a/drivers/net/igb/e1000_phy.c +++ b/drivers/net/igb/e1000_phy.c @@ -61,7 +61,7 @@ static const u16 e1000_igp_2_cable_length_table[] = sizeof(e1000_igp_2_cable_length_table[0])) /** - * e1000_check_reset_block - Check if PHY reset is blocked + * igb_check_reset_block - Check if PHY reset is blocked * @hw: pointer to the HW structure * * Read the PHY management control register and check whether a PHY reset @@ -79,7 +79,7 @@ s32 igb_check_reset_block(struct e1000_hw *hw) } /** - * e1000_get_phy_id - Retrieve the PHY ID and revision + * igb_get_phy_id - Retrieve the PHY ID and revision * @hw: pointer to the HW structure * * Reads the PHY registers and stores the PHY ID and possibly the PHY @@ -109,7 +109,7 @@ out: } /** - * e1000_phy_reset_dsp - Reset PHY DSP + * igb_phy_reset_dsp - Reset PHY DSP * @hw: pointer to the HW structure * * Reset the digital signal processor. @@ -129,7 +129,7 @@ out: } /** - * e1000_read_phy_reg_mdic - Read MDI control register + * igb_read_phy_reg_mdic - Read MDI control register * @hw: pointer to the HW structure * @offset: register offset to be read * @data: pointer to the read data @@ -144,7 +144,7 @@ static s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) s32 ret_val = 0; if (offset > MAX_PHY_REG_ADDRESS) { - hw_dbg(hw, "PHY Address %d is out of range\n", offset); + hw_dbg("PHY Address %d is out of range\n", offset); ret_val = -E1000_ERR_PARAM; goto out; } @@ -172,12 +172,12 @@ static s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) break; } if (!(mdic & E1000_MDIC_READY)) { - hw_dbg(hw, "MDI Read did not complete\n"); + hw_dbg("MDI Read did not complete\n"); ret_val = -E1000_ERR_PHY; goto out; } if (mdic & E1000_MDIC_ERROR) { - hw_dbg(hw, "MDI Error\n"); + hw_dbg("MDI Error\n"); ret_val = -E1000_ERR_PHY; goto out; } @@ -188,7 +188,7 @@ out: } /** - * e1000_write_phy_reg_mdic - Write MDI control register + * igb_write_phy_reg_mdic - Write MDI control register * @hw: pointer to the HW structure * @offset: register offset to write to * @data: data to write to register at offset @@ -202,7 +202,7 @@ static s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) s32 ret_val = 0; if (offset > MAX_PHY_REG_ADDRESS) { - hw_dbg(hw, "PHY Address %d is out of range\n", offset); + hw_dbg("PHY Address %d is out of range\n", offset); ret_val = -E1000_ERR_PARAM; goto out; } @@ -231,12 +231,12 @@ static s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) break; } if (!(mdic & E1000_MDIC_READY)) { - hw_dbg(hw, "MDI Write did not complete\n"); + hw_dbg("MDI Write did not complete\n"); ret_val = -E1000_ERR_PHY; goto out; } if (mdic & E1000_MDIC_ERROR) { - hw_dbg(hw, "MDI Error\n"); + hw_dbg("MDI Error\n"); ret_val = -E1000_ERR_PHY; goto out; } @@ -246,7 +246,7 @@ out: } /** - * e1000_read_phy_reg_igp - Read igp PHY register + * igb_read_phy_reg_igp - Read igp PHY register * @hw: pointer to the HW structure * @offset: register offset to be read * @data: pointer to the read data @@ -284,7 +284,7 @@ out: } /** - * e1000_write_phy_reg_igp - Write igp PHY register + * igb_write_phy_reg_igp - Write igp PHY register * @hw: pointer to the HW structure * @offset: register offset to write to * @data: data to write at register offset @@ -321,7 +321,7 @@ out: } /** - * e1000_copper_link_setup_m88 - Setup m88 PHY's for copper link + * igb_copper_link_setup_m88 - Setup m88 PHY's for copper link * @hw: pointer to the HW structure * * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock @@ -423,7 +423,7 @@ s32 igb_copper_link_setup_m88(struct e1000_hw *hw) /* Commit the changes. */ ret_val = igb_phy_sw_reset(hw); if (ret_val) { - hw_dbg(hw, "Error committing the PHY changes\n"); + hw_dbg("Error committing the PHY changes\n"); goto out; } @@ -432,7 +432,7 @@ out: } /** - * e1000_copper_link_setup_igp - Setup igp PHY's for copper link + * igb_copper_link_setup_igp - Setup igp PHY's for copper link * @hw: pointer to the HW structure * * Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for @@ -451,7 +451,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) ret_val = hw->phy.ops.reset_phy(hw); if (ret_val) { - hw_dbg(hw, "Error resetting the PHY.\n"); + hw_dbg("Error resetting the PHY.\n"); goto out; } @@ -467,7 +467,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) if (hw->phy.ops.set_d3_lplu_state) ret_val = hw->phy.ops.set_d3_lplu_state(hw, false); if (ret_val) { - hw_dbg(hw, "Error Disabling LPLU D3\n"); + hw_dbg("Error Disabling LPLU D3\n"); goto out; } } @@ -475,7 +475,7 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw) /* disable lplu d0 during driver init */ ret_val = hw->phy.ops.set_d0_lplu_state(hw, false); if (ret_val) { - hw_dbg(hw, "Error Disabling LPLU D0\n"); + hw_dbg("Error Disabling LPLU D0\n"); goto out; } /* Configure mdi-mdix settings */ @@ -570,7 +570,7 @@ out: } /** - * e1000_copper_link_autoneg - Setup/Enable autoneg for copper link + * igb_copper_link_autoneg - Setup/Enable autoneg for copper link * @hw: pointer to the HW structure * * Performs initial bounds checking on autoneg advertisement parameter, then @@ -597,13 +597,13 @@ s32 igb_copper_link_autoneg(struct e1000_hw *hw) if (phy->autoneg_advertised == 0) phy->autoneg_advertised = phy->autoneg_mask; - hw_dbg(hw, "Reconfiguring auto-neg advertisement params\n"); + hw_dbg("Reconfiguring auto-neg advertisement params\n"); ret_val = igb_phy_setup_autoneg(hw); if (ret_val) { - hw_dbg(hw, "Error Setting up Auto-Negotiation\n"); + hw_dbg("Error Setting up Auto-Negotiation\n"); goto out; } - hw_dbg(hw, "Restarting Auto-Neg\n"); + hw_dbg("Restarting Auto-Neg\n"); /* * Restart auto-negotiation by setting the Auto Neg Enable bit and @@ -625,8 +625,8 @@ s32 igb_copper_link_autoneg(struct e1000_hw *hw) if (phy->autoneg_wait_to_complete) { ret_val = igb_wait_autoneg(hw); if (ret_val) { - hw_dbg(hw, "Error while waiting for " - "autoneg to complete\n"); + hw_dbg("Error while waiting for " + "autoneg to complete\n"); goto out; } } @@ -638,7 +638,7 @@ out: } /** - * e1000_phy_setup_autoneg - Configure PHY for auto-negotiation + * igb_phy_setup_autoneg - Configure PHY for auto-negotiation * @hw: pointer to the HW structure * * Reads the MII auto-neg advertisement register and/or the 1000T control @@ -689,39 +689,39 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) NWAY_AR_10T_HD_CAPS); mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS); - hw_dbg(hw, "autoneg_advertised %x\n", phy->autoneg_advertised); + hw_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); /* Do we want to advertise 10 Mb Half Duplex? */ if (phy->autoneg_advertised & ADVERTISE_10_HALF) { - hw_dbg(hw, "Advertise 10mb Half duplex\n"); + hw_dbg("Advertise 10mb Half duplex\n"); mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS; } /* Do we want to advertise 10 Mb Full Duplex? */ if (phy->autoneg_advertised & ADVERTISE_10_FULL) { - hw_dbg(hw, "Advertise 10mb Full duplex\n"); + hw_dbg("Advertise 10mb Full duplex\n"); mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS; } /* Do we want to advertise 100 Mb Half Duplex? */ if (phy->autoneg_advertised & ADVERTISE_100_HALF) { - hw_dbg(hw, "Advertise 100mb Half duplex\n"); + hw_dbg("Advertise 100mb Half duplex\n"); mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS; } /* Do we want to advertise 100 Mb Full Duplex? */ if (phy->autoneg_advertised & ADVERTISE_100_FULL) { - hw_dbg(hw, "Advertise 100mb Full duplex\n"); + hw_dbg("Advertise 100mb Full duplex\n"); mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS; } /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ if (phy->autoneg_advertised & ADVERTISE_1000_HALF) - hw_dbg(hw, "Advertise 1000mb Half duplex request denied!\n"); + hw_dbg("Advertise 1000mb Half duplex request denied!\n"); /* Do we want to advertise 1000 Mb Full Duplex? */ if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { - hw_dbg(hw, "Advertise 1000mb Full duplex\n"); + hw_dbg("Advertise 1000mb Full duplex\n"); mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS; } @@ -780,7 +780,7 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); break; default: - hw_dbg(hw, "Flow control param set incorrectly\n"); + hw_dbg("Flow control param set incorrectly\n"); ret_val = -E1000_ERR_CONFIG; goto out; } @@ -790,7 +790,7 @@ static s32 igb_phy_setup_autoneg(struct e1000_hw *hw) if (ret_val) goto out; - hw_dbg(hw, "Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); + hw_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); if (phy->autoneg_mask & ADVERTISE_1000_FULL) { ret_val = hw->phy.ops.write_phy_reg(hw, @@ -805,7 +805,7 @@ out: } /** - * e1000_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY + * igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY * @hw: pointer to the HW structure * * Calls the PHY setup function to force speed and duplex. Clears the @@ -846,13 +846,12 @@ s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw) if (ret_val) goto out; - hw_dbg(hw, "IGP PSCR: %X\n", phy_data); + hw_dbg("IGP PSCR: %X\n", phy_data); udelay(1); if (phy->autoneg_wait_to_complete) { - hw_dbg(hw, - "Waiting for forced speed/duplex link on IGP phy.\n"); + hw_dbg("Waiting for forced speed/duplex link on IGP phy.\n"); ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, @@ -862,7 +861,7 @@ s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw) goto out; if (!link) - hw_dbg(hw, "Link taking longer than expected.\n"); + hw_dbg("Link taking longer than expected.\n"); /* Try once more */ ret_val = igb_phy_has_link(hw, @@ -878,7 +877,7 @@ out: } /** - * e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY + * igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY * @hw: pointer to the HW structure * * Calls the PHY setup function to force speed and duplex. Clears the @@ -909,7 +908,7 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) if (ret_val) goto out; - hw_dbg(hw, "M88E1000 PSCR: %X\n", phy_data); + hw_dbg("M88E1000 PSCR: %X\n", phy_data); ret_val = hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &phy_data); if (ret_val) @@ -927,8 +926,7 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) udelay(1); if (phy->autoneg_wait_to_complete) { - hw_dbg(hw, - "Waiting for forced speed/duplex link on M88 phy.\n"); + hw_dbg("Waiting for forced speed/duplex link on M88 phy.\n"); ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, @@ -993,7 +991,7 @@ out: } /** - * e1000_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex + * igb_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex * @hw: pointer to the HW structure * @phy_ctrl: pointer to current value of PHY_CONTROL * @@ -1028,11 +1026,11 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { ctrl &= ~E1000_CTRL_FD; *phy_ctrl &= ~MII_CR_FULL_DUPLEX; - hw_dbg(hw, "Half Duplex\n"); + hw_dbg("Half Duplex\n"); } else { ctrl |= E1000_CTRL_FD; *phy_ctrl |= MII_CR_FULL_DUPLEX; - hw_dbg(hw, "Full Duplex\n"); + hw_dbg("Full Duplex\n"); } /* Forcing 10mb or 100mb? */ @@ -1040,12 +1038,12 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, ctrl |= E1000_CTRL_SPD_100; *phy_ctrl |= MII_CR_SPEED_100; *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); - hw_dbg(hw, "Forcing 100mb\n"); + hw_dbg("Forcing 100mb\n"); } else { ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); *phy_ctrl |= MII_CR_SPEED_10; *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100); - hw_dbg(hw, "Forcing 10mb\n"); + hw_dbg("Forcing 10mb\n"); } igb_config_collision_dist(hw); @@ -1054,7 +1052,7 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, } /** - * e1000_set_d3_lplu_state - Sets low power link up state for D3 + * igb_set_d3_lplu_state - Sets low power link up state for D3 * @hw: pointer to the HW structure * @active: boolean used to enable/disable lplu * @@ -1146,7 +1144,7 @@ out: } /** - * e1000_check_downshift - Checks whether a downshift in speed occured + * igb_check_downshift - Checks whether a downshift in speed occured * @hw: pointer to the HW structure * * Success returns 0, Failure returns 1 @@ -1188,7 +1186,7 @@ out: } /** - * e1000_check_polarity_m88 - Checks the polarity. + * igb_check_polarity_m88 - Checks the polarity. * @hw: pointer to the HW structure * * Success returns 0, Failure returns -E1000_ERR_PHY (-2) @@ -1212,7 +1210,7 @@ static s32 igb_check_polarity_m88(struct e1000_hw *hw) } /** - * e1000_check_polarity_igp - Checks the polarity. + * igb_check_polarity_igp - Checks the polarity. * @hw: pointer to the HW structure * * Success returns 0, Failure returns -E1000_ERR_PHY (-2) @@ -1260,7 +1258,7 @@ out: } /** - * e1000_wait_autoneg - Wait for auto-neg compeletion + * igb_wait_autoneg - Wait for auto-neg compeletion * @hw: pointer to the HW structure * * Waits for auto-negotiation to complete or for the auto-negotiation time @@ -1292,7 +1290,7 @@ static s32 igb_wait_autoneg(struct e1000_hw *hw) } /** - * e1000_phy_has_link - Polls PHY for link + * igb_phy_has_link - Polls PHY for link * @hw: pointer to the HW structure * @iterations: number of times to poll for link * @usec_interval: delay between polling attempts @@ -1332,7 +1330,7 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations, } /** - * e1000_get_cable_length_m88 - Determine cable length for m88 PHY + * igb_get_cable_length_m88 - Determine cable length for m88 PHY * @hw: pointer to the HW structure * * Reads the PHY specific status register to retrieve the cable length @@ -1369,7 +1367,7 @@ out: } /** - * e1000_get_cable_length_igp_2 - Determine cable length for igp2 PHY + * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY * @hw: pointer to the HW structure * * The automatic gain control (agc) normalizes the amplitude of the @@ -1442,7 +1440,7 @@ out: } /** - * e1000_get_phy_info_m88 - Retrieve PHY information + * igb_get_phy_info_m88 - Retrieve PHY information * @hw: pointer to the HW structure * * Valid for only copper links. Read the PHY status register (sticky read) @@ -1459,7 +1457,7 @@ s32 igb_get_phy_info_m88(struct e1000_hw *hw) bool link; if (hw->phy.media_type != e1000_media_type_copper) { - hw_dbg(hw, "Phy info is only valid for copper media\n"); + hw_dbg("Phy info is only valid for copper media\n"); ret_val = -E1000_ERR_CONFIG; goto out; } @@ -1469,7 +1467,7 @@ s32 igb_get_phy_info_m88(struct e1000_hw *hw) goto out; if (!link) { - hw_dbg(hw, "Phy info is only valid if link is up\n"); + hw_dbg("Phy info is only valid if link is up\n"); ret_val = -E1000_ERR_CONFIG; goto out; } @@ -1523,7 +1521,7 @@ out: } /** - * e1000_get_phy_info_igp - Retrieve igp PHY information + * igb_get_phy_info_igp - Retrieve igp PHY information * @hw: pointer to the HW structure * * Read PHY status to determine if link is up. If link is up, then @@ -1543,7 +1541,7 @@ s32 igb_get_phy_info_igp(struct e1000_hw *hw) goto out; if (!link) { - hw_dbg(hw, "Phy info is only valid if link is up\n"); + hw_dbg("Phy info is only valid if link is up\n"); ret_val = -E1000_ERR_CONFIG; goto out; } @@ -1590,7 +1588,7 @@ out: } /** - * e1000_phy_sw_reset - PHY software reset + * igb_phy_sw_reset - PHY software reset * @hw: pointer to the HW structure * * Does a software reset of the PHY by reading the PHY control register and @@ -1617,7 +1615,7 @@ out: } /** - * e1000_phy_hw_reset - PHY hardware reset + * igb_phy_hw_reset - PHY hardware reset * @hw: pointer to the HW structure * * Verify the reset block is not blocking us from resetting. Acquire @@ -1663,7 +1661,7 @@ out: /* Internal function pointers */ /** - * e1000_get_phy_cfg_done - Generic PHY configuration done + * igb_get_phy_cfg_done - Generic PHY configuration done * @hw: pointer to the HW structure * * Return success if silicon family did not implement a family specific @@ -1678,7 +1676,7 @@ static s32 igb_get_phy_cfg_done(struct e1000_hw *hw) } /** - * e1000_release_phy - Generic release PHY + * igb_release_phy - Generic release PHY * @hw: pointer to the HW structure * * Return if silicon family does not require a semaphore when accessing the @@ -1691,7 +1689,7 @@ static void igb_release_phy(struct e1000_hw *hw) } /** - * e1000_acquire_phy - Generic acquire PHY + * igb_acquire_phy - Generic acquire PHY * @hw: pointer to the HW structure * * Return success if silicon family does not require a semaphore when @@ -1706,7 +1704,7 @@ static s32 igb_acquire_phy(struct e1000_hw *hw) } /** - * e1000_phy_force_speed_duplex - Generic force PHY speed/duplex + * igb_phy_force_speed_duplex - Generic force PHY speed/duplex * @hw: pointer to the HW structure * * When the silicon family has not implemented a forced speed/duplex @@ -1721,14 +1719,14 @@ s32 igb_phy_force_speed_duplex(struct e1000_hw *hw) } /** - * e1000_phy_init_script_igp3 - Inits the IGP3 PHY + * igb_phy_init_script_igp3 - Inits the IGP3 PHY * @hw: pointer to the HW structure * * Initializes a Intel Gigabit PHY3 when an EEPROM is not present. **/ s32 igb_phy_init_script_igp3(struct e1000_hw *hw) { - hw_dbg(hw, "Running IGP 3 PHY init script\n"); + hw_dbg("Running IGP 3 PHY init script\n"); /* PHY init IGP 3 */ /* Enable rise/fall, 10-mode work in class-A */ |