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authorAlexander Duyck <alexander.h.duyck@intel.com>2009-11-19 12:42:21 +0000
committerDavid S. Miller <davem@davemloft.net>2009-11-20 10:00:13 -0800
commit55cac248caa4a5f181a11cd2f269a672bef3d3b5 (patch)
treea4eec7f298d197646124346e5bb7cb9eb4de2586 /drivers/net/igb/e1000_regs.h
parentbb2ac47bcfd47ed9431ff1676ec8d79250c941c9 (diff)
igb: Add full support for 82580 devices
This patch makes use of the 82580 PHY and MAC support added and adds a set of supported device IDs for said hardware. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_regs.h')
-rw-r--r--drivers/net/igb/e1000_regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h
index 409c44b4d77..dd4e6ffd29f 100644
--- a/drivers/net/igb/e1000_regs.h
+++ b/drivers/net/igb/e1000_regs.h
@@ -89,6 +89,8 @@
#define E1000_SYSTIML 0x0B600 /* System time register Low - RO */
#define E1000_SYSTIMH 0x0B604 /* System time register High - RO */
#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */
+#define E1000_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */
+#define E1000_SYSTIMR 0x0B6F8 /* System time register Residue */
/* Filtering Registers */
#define E1000_SAQF(_n) (0x5980 + 4 * (_n))
@@ -318,4 +320,6 @@
#define array_rd32(reg, offset) \
(readl(hw->hw_addr + reg + ((offset) << 2)))
+/* DMA Coalescing registers */
+#define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */
#endif