diff options
| author | Amit Kumar Salecha <amit.salecha@qlogic.com> | 2010-05-11 23:53:05 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-05-12 23:02:31 -0700 |
| commit | 0b9715e64f7d46a9620d4d5042a5e28f5595ed54 (patch) | |
| tree | b9cf3eda5387342052cac82712184777a59ef906 /drivers/net/netxen/netxen_nic_hw.c | |
| parent | 14e2cfbb79712f07962be027016868ba487c696b (diff) | |
netxen: handle queue manager access
Check the access by tools for hardware queue engine and handle it
separately than other block registers, otherwise incorrect data
is returned.
Support for only NX3031 based cards.
Acked-by: Dhananjay Phadke <dhananjay.phadke@qlogic.com>
Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.c')
| -rw-r--r-- | drivers/net/netxen/netxen_nic_hw.c | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index be639886078..5c496f8d7c4 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c @@ -62,9 +62,6 @@ static inline void writeq(u64 val, void __iomem *addr) } #endif -#define ADDR_IN_RANGE(addr, low, high) \ - (((addr) < (high)) && ((addr) >= (low))) - #define PCI_OFFSET_FIRST_RANGE(adapter, off) \ ((adapter)->ahw.pci_base0 + (off)) #define PCI_OFFSET_SECOND_RANGE(adapter, off) \ @@ -1448,6 +1445,28 @@ unlock: return ret; } +void +netxen_pci_camqm_read_2M(struct netxen_adapter *adapter, u64 off, u64 *data) +{ + void __iomem *addr = adapter->ahw.pci_base0 + + NETXEN_PCI_CAMQM_2M_BASE + (off - NETXEN_PCI_CAMQM); + + spin_lock(&adapter->ahw.mem_lock); + *data = readq(addr); + spin_unlock(&adapter->ahw.mem_lock); +} + +void +netxen_pci_camqm_write_2M(struct netxen_adapter *adapter, u64 off, u64 data) +{ + void __iomem *addr = adapter->ahw.pci_base0 + + NETXEN_PCI_CAMQM_2M_BASE + (off - NETXEN_PCI_CAMQM); + + spin_lock(&adapter->ahw.mem_lock); + writeq(data, addr); + spin_unlock(&adapter->ahw.mem_lock); +} + #define MAX_CTL_CHECK 1000 static int |