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authorschacko <schacko@qlogic.com>2010-06-17 02:56:40 +0000
committerDavid S. Miller <davem@davemloft.net>2010-06-17 08:57:55 -0700
commit8f891387aa73b85d2ea8d953e04dac224f687e52 (patch)
treecbf7101c7aa3721cb02298f3f454692bfbd18524 /drivers/net/qlcnic/qlcnic_ctx.c
parent7f9a0c34d26b1ce8a512555ca144e622dea4dc44 (diff)
qlcnic: seperate interrupt for TX
Earlier all poll routine can process rx and tx, But now one poll routine to process rx + tx and other for rx only. Last msix vector will be used for separate tx interrupt. o This is supported from fw version 4.4.2. o Bump version 5.0.5 Signed-off-by: Sony Chacko <schacko@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/qlcnic/qlcnic_ctx.c')
-rw-r--r--drivers/net/qlcnic/qlcnic_ctx.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/qlcnic/qlcnic_ctx.c b/drivers/net/qlcnic/qlcnic_ctx.c
index 90ed6fbaee3..7c96c8e06c3 100644
--- a/drivers/net/qlcnic/qlcnic_ctx.c
+++ b/drivers/net/qlcnic/qlcnic_ctx.c
@@ -152,9 +152,14 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
- cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN);
+ cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
+ | QLCNIC_CAP0_VALIDOFF);
cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
+ prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
+ msix_handler);
+ prq->txrx_sds_binding = nsds_rings - 1;
+
prq->capabilities[0] = cpu_to_le32(cap);
prq->host_int_crb_mode =
cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);