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authorBen Hutchings <bhutchings@solarflare.com>2008-12-12 21:44:14 -0800
committerDavid S. Miller <davem@davemloft.net>2008-12-12 21:57:58 -0800
commit27dd2caca4eabe7c13a052b7456495ba75535e6a (patch)
tree514e7844ab78e5110e09d1e4a650e3283cdd32e9 /drivers/net/sfc/mdio_10g.h
parentf31a45d2f45a7667acd6e85ab6613b0910c55ea9 (diff)
sfc: Add support for MMDs numbered >15
Combine DEVS0 and DEVS1 registers into a 32-bit mask instead of reading just DEVS0. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/mdio_10g.h')
-rw-r--r--drivers/net/sfc/mdio_10g.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/sfc/mdio_10g.h b/drivers/net/sfc/mdio_10g.h
index db9f358349c..45163838130 100644
--- a/drivers/net/sfc/mdio_10g.h
+++ b/drivers/net/sfc/mdio_10g.h
@@ -73,14 +73,14 @@
#define MDIO_ID_MODEL(_id32) ((_id32 >> 4) & 0x3f)
#define MDIO_ID_OUI(_id32) (_id32 >> 10)
-/* Bits in MMDREG_DEVS0. Someone thoughtfully layed things out
+/* Bits in MMDREG_DEVS0/1. Someone thoughtfully layed things out
* so the 'bit present' bit number of an MMD is the number of
* that MMD */
#define DEV_PRESENT_BIT(_b) (1 << _b)
-#define MDIO_MMDREG_DEVS0_PHYXS DEV_PRESENT_BIT(MDIO_MMD_PHYXS)
-#define MDIO_MMDREG_DEVS0_PCS DEV_PRESENT_BIT(MDIO_MMD_PCS)
-#define MDIO_MMDREG_DEVS0_PMAPMD DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)
+#define MDIO_MMDREG_DEVS_PHYXS DEV_PRESENT_BIT(MDIO_MMD_PHYXS)
+#define MDIO_MMDREG_DEVS_PCS DEV_PRESENT_BIT(MDIO_MMD_PCS)
+#define MDIO_MMDREG_DEVS_PMAPMD DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)
/* Bits in MMDREG_STAT2 */
#define MDIO_MMDREG_STAT2_PRESENT_VAL (2)