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authorJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>2009-04-07 13:34:16 -0700
committerJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>2009-04-07 13:34:16 -0700
commit38f4b8c0da01ae7cd9b93386842ce272d6fde9ab (patch)
tree3c8c52201aac038094bfea7efdd0984a8f62045e /drivers/net/tg3.c
parenta811454027352c762e0d5bba1b1d8f7d26bf96ae (diff)
parent8e2c4f2844c0e8dcdfe312e5f2204854ca8532c6 (diff)
Merge commit 'origin/master' into for-linus/xen/master
* commit 'origin/master': (4825 commits) Fix build errors due to CONFIG_BRANCH_TRACER=y parport: Use the PCI IRQ if offered tty: jsm cleanups Adjust path to gpio headers KGDB_SERIAL_CONSOLE check for module Change KCONFIG name tty: Blackin CTS/RTS Change hardware flow control from poll to interrupt driven Add support for the MAX3100 SPI UART. lanana: assign a device name and numbering for MAX3100 serqt: initial clean up pass for tty side tty: Use the generic RS485 ioctl on CRIS tty: Correct inline types for tty_driver_kref_get() splice: fix deadlock in splicing to file nilfs2: support nanosecond timestamp nilfs2: introduce secondary super block nilfs2: simplify handling of active state of segments nilfs2: mark minor flag for checkpoint created by internal operation nilfs2: clean up sketch file nilfs2: super block operations fix endian bug ... Conflicts: arch/x86/include/asm/thread_info.h arch/x86/lguest/boot.c drivers/xen/manage.c
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index f7efcecc410..6a736dda3ee 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4392,7 +4392,7 @@ static void tg3_recycle_rx(struct tg3 *tp, u32 opaque_key,
#if TG3_VLAN_TAG_USED
static int tg3_vlan_rx(struct tg3 *tp, struct sk_buff *skb, u16 vlan_tag)
{
- return vlan_hwaccel_receive_skb(skb, tp->vlgrp, vlan_tag);
+ return vlan_gro_receive(&tp->napi, tp->vlgrp, vlan_tag, skb);
}
#endif
@@ -4539,7 +4539,7 @@ static int tg3_rx(struct tg3 *tp, int budget)
desc->err_vlan & RXD_VLAN_MASK);
} else
#endif
- netif_receive_skb(skb);
+ napi_gro_receive(&tp->napi, skb);
received++;
budget--;
@@ -4975,7 +4975,7 @@ static inline int tg3_40bit_overflow_test(struct tg3 *tp, dma_addr_t mapping,
{
#if defined(CONFIG_HIGHMEM) && (BITS_PER_LONG == 64)
if (tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG)
- return (((u64) mapping + len) > DMA_40BIT_MASK);
+ return (((u64) mapping + len) > DMA_BIT_MASK(40));
return 0;
#else
return 0;
@@ -11225,7 +11225,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
return tg3_phy_init(tp);
/* Reading the PHY ID register can conflict with ASF
- * firwmare access to the PHY hardware.
+ * firmware access to the PHY hardware.
*/
err = 0;
if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
@@ -13228,17 +13228,17 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
* do DMA address check in tg3_start_xmit().
*/
if (tp->tg3_flags2 & TG3_FLG2_IS_5788)
- persist_dma_mask = dma_mask = DMA_32BIT_MASK;
+ persist_dma_mask = dma_mask = DMA_BIT_MASK(32);
else if (tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG) {
- persist_dma_mask = dma_mask = DMA_40BIT_MASK;
+ persist_dma_mask = dma_mask = DMA_BIT_MASK(40);
#ifdef CONFIG_HIGHMEM
- dma_mask = DMA_64BIT_MASK;
+ dma_mask = DMA_BIT_MASK(64);
#endif
} else
- persist_dma_mask = dma_mask = DMA_64BIT_MASK;
+ persist_dma_mask = dma_mask = DMA_BIT_MASK(64);
/* Configure DMA attributes. */
- if (dma_mask > DMA_32BIT_MASK) {
+ if (dma_mask > DMA_BIT_MASK(32)) {
err = pci_set_dma_mask(pdev, dma_mask);
if (!err) {
dev->features |= NETIF_F_HIGHDMA;
@@ -13251,8 +13251,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
}
}
}
- if (err || dma_mask == DMA_32BIT_MASK) {
- err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+ if (err || dma_mask == DMA_BIT_MASK(32)) {
+ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (err) {
printk(KERN_ERR PFX "No usable DMA configuration, "
"aborting.\n");
@@ -13393,8 +13393,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0);
printk(KERN_INFO "%s: dma_rwctrl[%08x] dma_mask[%d-bit]\n",
dev->name, tp->dma_rwctrl,
- (pdev->dma_mask == DMA_32BIT_MASK) ? 32 :
- (((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64));
+ (pdev->dma_mask == DMA_BIT_MASK(32)) ? 32 :
+ (((u64) pdev->dma_mask == DMA_BIT_MASK(40)) ? 40 : 64));
return 0;