diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2008-11-21 17:19:41 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-11-21 17:19:41 -0800 |
| commit | dfe00d7d890134f9cafda49e3e60e6ce27af91ed (patch) | |
| tree | dc46d1b8a8896763787a29eb0025ba1fe7a6ec39 /drivers/net/tg3.c | |
| parent | 6833c043f9fc03696fde623914c4a0277df2a0bc (diff) | |
tg3: Extract FW ver from alt NVRAM formats
This patch extracts the bootcode firmware version from the alternate
selfboot patch NVRAM format. This format is used on the 5784, 5761 and
some newer devices.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 6972fe5ccbf..2b70b0f6f60 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -11951,6 +11951,51 @@ static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset) return 1; } +static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val) +{ + u32 offset, major, minor, build; + + tp->fw_ver[0] = 's'; + tp->fw_ver[1] = 'b'; + tp->fw_ver[2] = '\0'; + + if ((val & TG3_EEPROM_SB_FORMAT_MASK) != TG3_EEPROM_SB_FORMAT_1) + return; + + switch (val & TG3_EEPROM_SB_REVISION_MASK) { + case TG3_EEPROM_SB_REVISION_0: + offset = TG3_EEPROM_SB_F1R0_EDH_OFF; + break; + case TG3_EEPROM_SB_REVISION_2: + offset = TG3_EEPROM_SB_F1R2_EDH_OFF; + break; + case TG3_EEPROM_SB_REVISION_3: + offset = TG3_EEPROM_SB_F1R3_EDH_OFF; + break; + default: + return; + } + + if (tg3_nvram_read_swab(tp, offset, &val)) + return; + + build = (val & TG3_EEPROM_SB_EDH_BLD_MASK) >> + TG3_EEPROM_SB_EDH_BLD_SHFT; + major = (val & TG3_EEPROM_SB_EDH_MAJ_MASK) >> + TG3_EEPROM_SB_EDH_MAJ_SHFT; + minor = val & TG3_EEPROM_SB_EDH_MIN_MASK; + + if (minor > 99 || build > 26) + return; + + snprintf(&tp->fw_ver[2], 30, " v%d.%02d", major, minor); + + if (build > 0) { + tp->fw_ver[8] = 'a' + build - 1; + tp->fw_ver[9] = '\0'; + } +} + static void __devinit tg3_read_fw_ver(struct tg3 *tp) { u32 val, offset, start; @@ -11960,8 +12005,12 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp) if (tg3_nvram_read_swab(tp, 0, &val)) return; - if (val != TG3_EEPROM_MAGIC) + if (val != TG3_EEPROM_MAGIC) { + if ((val & TG3_EEPROM_MAGIC_FW_MSK) == TG3_EEPROM_MAGIC_FW) + tg3_read_sb_ver(tp, val); + return; + } if (tg3_nvram_read_swab(tp, 0xc, &offset) || tg3_nvram_read_swab(tp, 0x4, &start)) |