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authorMatt Carlson <mcarlson@broadcom.com>2010-08-02 11:25:55 +0000
committerDavid S. Miller <davem@davemloft.net>2010-08-02 15:46:26 -0700
commit6de34cb963a934953fdd365937b4b75959256602 (patch)
tree2331f406145f850104bb4162447b463496f49313 /drivers/net/tg3.c
parent83bf2e4089bebc2c7fd14a79de5954b26fe8d4af (diff)
tg3: Add 5784 ASIC rev to earlier PCIe MPS fix
tg3 commit e7126997342560533317d8467e8516119ebcbd21 entitled "tg3: Preserve PCIe MPS setting for new devs" attempted to ensure the PCIe link negotiated Maximum Payload Size (MPS) setting was 128 bytes for all devices that didn't support higher speeds. The 5784 device was mistakenly added to this list when it shouldn't have. This patch removes the 5784 ASIC rev devices from that list. Reviewed-by: Benjamin Li <benli@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index b26a5778293..98ca0d20d20 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7002,8 +7002,7 @@ static int tg3_chip_reset(struct tg3 *tp)
* Older PCIe devices only support the 128 byte
* MPS setting. Enforce the restriction.
*/
- if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT) ||
- (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784))
+ if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
val16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
pci_write_config_word(tp->pdev,
tp->pcie_cap + PCI_EXP_DEVCTL,