diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2009-08-25 10:06:01 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-08-26 15:47:45 -0700 |
| commit | 521e6b90dd3f0392062845d7ef13e6e41bb99d8a (patch) | |
| tree | cf7405a1a6a3b3b247c9c3c2c24372779c7faea6 /drivers/net/tg3.c | |
| parent | c46b59b241ec52ffaf92ece8d8ab726621d580fb (diff) | |
tg3: Fix 57780 asic rev PCIe link receiver errors
This patch fixes some PCIe link receiver errors by decreasing the internal
electrical idle timeout.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 46a3f86125b..e8def28877c 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -6719,6 +6719,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) val |= PCIE_PWR_MGMT_EXT_ASPM_TMR_EN | PCIE_PWR_MGMT_L1_THRESH_4MS; tw32(PCIE_PWR_MGMT_THRESH, val); + + val = tr32(TG3_PCIE_EIDLE_DELAY) & ~TG3_PCIE_EIDLE_DELAY_MASK; + tw32(TG3_PCIE_EIDLE_DELAY, val | TG3_PCIE_EIDLE_DELAY_13_CLKS); + + tw32(TG3_CORR_ERR_STAT, TG3_CORR_ERR_STAT_CLEAR); } /* This works around an issue with Athlon chipsets on |