diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2010-09-30 10:34:31 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-10-01 00:24:42 -0700 |
| commit | d309a46e42542223946d3a9e4e239fdc945cb53e (patch) | |
| tree | 43fae359546e61d0bda67d903d03db11d227033c /drivers/net/tg3.h | |
| parent | 66cfd1bd05a7a1c31c9cdbb2ddf5c57d1cddc5f6 (diff) | |
tg3: 5719: Prevent tx data corruption
This patch enables a bit that prevents read DMA overflows and adjusts
the txmbuf margin from the hardware default. The combination of these
modifications prevents a tx data corruption issue we were seeing on the
5719.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 44733e4a68a..ec62f057ff6 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -1225,6 +1225,7 @@ #define BUFMGR_MODE_ATTN_ENABLE 0x00000004 #define BUFMGR_MODE_BM_TEST 0x00000008 #define BUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010 +#define BUFMGR_MODE_NO_TX_UNDERRUN 0x80000000 #define BUFMGR_STATUS 0x00004404 #define BUFMGR_STATUS_ERROR 0x00000004 #define BUFMGR_STATUS_MBLOW 0x00000010 @@ -1306,7 +1307,12 @@ #define TG3_RDMA_RSRVCTRL_REG 0x00004900 #define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 -/* 0x4904 --> 0x4c00 unused */ +/* 0x4904 --> 0x4910 unused */ + +#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910 +#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K 0x00030000 +#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K 0x000c0000 +/* 0x4914 --> 0x4c00 unused */ /* Write DMA control registers */ #define WDMAC_MODE 0x00004c00 |