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authorPeter Horton <zero@colonel-panic.org>2008-03-25 12:39:09 +0100
committerJeff Garzik <jgarzik@redhat.com>2008-04-16 20:40:01 -0400
commit10c6462090cccb643f31e26a14cb933bc31d8666 (patch)
tree9e5c5c509d86d5ab425a089bd95652d46aeac73c /drivers/net/tulip/tulip.h
parent48dd59e398455b58910910bc272e0da85f11bd98 (diff)
[netdrvr] tulip: Better MWI workaround for 21143 rev 65 chip errata
This patch works around the MWI bug on the DC21143 rev 65 Tulip by ensuring that the receive buffers don't end on a cache line boundary (as documented in the errata). This patch is required for the MIPS based Cobalt Qube/RaQ as supporting the extra PCI commands seems to reduce the chance of a hard lockup between the Tulip and the PCI bridge. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/tulip/tulip.h')
-rw-r--r--drivers/net/tulip/tulip.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h
index 3f69f53d776..908422f2f32 100644
--- a/drivers/net/tulip/tulip.h
+++ b/drivers/net/tulip/tulip.h
@@ -268,7 +268,12 @@ enum t21143_csr6_bits {
#define RX_RING_SIZE 128
#define MEDIA_MASK 31
-#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
+/* The receiver on the DC21143 rev 65 can fail to close the last
+ * receive descriptor in certain circumstances (see errata) when
+ * using MWI. This can only occur if the receive buffer ends on
+ * a cache line boundary, so the "+ 4" below ensures it doesn't.
+ */
+#define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */
#define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */