diff options
| author | Nick Kossifidis <mickflemm@gmail.com> | 2010-11-23 21:09:11 +0200 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-11-30 13:52:35 -0500 |
| commit | 3017fcab416d8d1ee48ca16aa9a3062f600dab8e (patch) | |
| tree | 8f6daedc2060c20a0a1a569e8e782991cd28f2a6 /drivers/net/wireless/ath/ath5k/ath5k.h | |
| parent | 25ddfa195735934256fda55bb4f2d749c19386ff (diff) | |
ath5k: Extend get_default_sifs/slot_time
* Extend get_default_sifs/slot_time to include timings for turbo
half and quarter rate modes.
* AR5210 code for now uses timings already on core clock units
instead of usecs so rename them (we 'll clean it up later).
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/ath5k.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath5k/ath5k.h | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 005cad02517..e11fc8f3919 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h @@ -226,16 +226,16 @@ #define AR5K_INIT_USEC 39 #define AR5K_INIT_USEC_TURBO 79 #define AR5K_INIT_USEC_32 31 -#define AR5K_INIT_SLOT_TIME 396 -#define AR5K_INIT_SLOT_TIME_TURBO 480 +#define AR5K_INIT_SLOT_TIME_CLOCK 396 +#define AR5K_INIT_SLOT_TIME_TURBO_CLOCK 480 #define AR5K_INIT_ACK_CTS_TIMEOUT 1024 #define AR5K_INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 #define AR5K_INIT_PROG_IFS 920 #define AR5K_INIT_PROG_IFS_TURBO 960 #define AR5K_INIT_EIFS 3440 #define AR5K_INIT_EIFS_TURBO 6880 -#define AR5K_INIT_SIFS 560 -#define AR5K_INIT_SIFS_TURBO 480 +#define AR5K_INIT_SIFS_CLOCK 560 +#define AR5K_INIT_SIFS_TURBO_CLOCK 480 #define AR5K_INIT_SH_RETRY 10 #define AR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY #define AR5K_INIT_SSH_RETRY 32 @@ -251,6 +251,22 @@ (AR5K_INIT_PROG_IFS_TURBO) \ ) +/* Slot time */ +#define AR5K_INIT_SLOT_TIME_TURBO 6 +#define AR5K_INIT_SLOT_TIME_DEFAULT 9 +#define AR5K_INIT_SLOT_TIME_HALF_RATE 13 +#define AR5K_INIT_SLOT_TIME_QUARTER_RATE 21 +#define AR5K_INIT_SLOT_TIME_B 20 +#define AR5K_SLOT_TIME_MAX 0xffff + +/* SIFS */ +#define AR5K_INIT_SIFS_TURBO 6 +/* XXX: 8 from initvals 10 from standard */ +#define AR5K_INIT_SIFS_DEFAULT_BG 8 +#define AR5K_INIT_SIFS_DEFAULT_A 16 +#define AR5K_INIT_SIFS_HALF_RATE 32 +#define AR5K_INIT_SIFS_QUARTER_RATE 64 + /* Rx latency for 5 and 10MHz operation (max ?) */ #define AR5K_INIT_RX_LAT_MAX 63 /* Tx latencies from initvals (5212 only but no problem |