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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2013-08-25 16:30:40 +0530
committerJohn W. Linville <linville@tuxdriver.com>2013-08-26 14:09:06 -0400
commitd1ae25a0174938f03e28dee8f3269a826fc1bec5 (patch)
tree37b563d41e412267868b4b563d164b0e77197009 /drivers/net/wireless/ath/ath9k/ath9k.h
parent8aada63cc408874916a19341ba514f941096e424 (diff)
ath9k: Fix ASPM workaround usage
The PCIE Workaround register (AR_WA/0x4004) is used to handle various hardware quirks. For AR9002 chips, AR_WA_D3_L1_DISABLE is used to prevent the HW from automatically entering L1 state when D3 is enforced. AR_WA_D3_L1_DISABLE has to be enabled for a few AR9280 based cards, mark them based on their PCI subdevice/subvendor IDs and enforce it in ar9002_hw_configpcipowersave(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ath9k.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 8519e75a2e7..2ee35f677c0 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -631,6 +631,7 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
#define ATH9K_PCI_CUS217 0x0004
#define ATH9K_PCI_WOW 0x0008
#define ATH9K_PCI_BT_ANT_DIV 0x0010
+#define ATH9K_PCI_D3_L1_WAR 0x0020
/*
* Default cache line size, in bytes.